Atmel AT89C51ID2 Data Sheet - Keil

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146 AT89C51ID2 Table 101. AC Parameters for a Fix Clock Symbol -M -L Min Max Min Max T RLRH 125 125 ns T WLWH 125 125 ns T RLDV 95 95 ns T RHDX 0 0 ns T RHDZ 25 25 ns T LLDV 155 155 ns T AVDV 160 160 ns T LLWL 45 105 45 105 ns T AVWL 70 70 ns T QVWX 5 5 ns T QVWH 155 155 ns T WHQX 10 10 ns T RLAZ 0 0 ns T WHLH 5 45 5 45 ns Table 102. AC Parameters for a Variable Clock Symbol Type Standard Clock X2 Clock X parameter for -M range X parameter for -L range Units T RLRH Min 6 T - x 3 T - x 25 25 ns T WLWH Min 6 T - x 3 T - x 25 25 ns T RLDV Max 5 T - x 2.5 T - x 30 30 ns T RHDX Min x x 0 0 ns T RHDZ Max 2 T - x T - x 25 25 ns T LLDV Max 8 T - x 4T -x 45 45 ns T AVDV Max 9 T - x 4.5 T - x 65 65 ns T LLWL Min 3 T - x 1.5 T - x 30 30 ns T LLWL Max 3 T + x 1.5 T + x 30 30 ns T AVWL Min 4 T - x 2 T - x 30 30 ns T QVWX Min T - x 0.5 T - x 20 20 ns T QVWH Min 7 T - x 3.5 T - x 20 20 ns T WHQX Min T - x 0.5 T - x 15 15 ns T RLAZ Max x x 0 0 ns T WHLH Min T - x 0.5 T - x 20 20 ns T WHLH Max T + x 0.5 T + x 20 20 ns Units 4289A–8051–09/03
External Data Memory Write Cycle 4289A–8051–09/03 ALE PSEN WR PORT 0 PORT 2 External Data Memory Read Cycle ALE PSEN RD PORT 0 PORT 2 Serial Port Timing - Shift Register Mode ADDRESS OR SFR-P2 ADDRESS OR SFR-P2 T LLAX Table 103. Symbol Description T QVWH A0-A7 DATA OUT T AVWL T LLAX T LLWL T QVWX T WLWH ADDRESS A8-A15 OR SFR P2 A0-A7 DATA IN T AVWL T LLWL T LLDV T AVDV Symbol Parameter T XLXL T QVHX T XHQX T XHDX T XHDV T RLAZ T RLRH ADDRESS A8-A15 OR SFR P2 Serial port clock cycle time Output data set-up to clock rising edge Output data hold after clock rising edge Input data hold after clock rising edge Clock rising edge to input data valid T WHLH T WHLH T RHDX AT89C51ID2 T WHQX T RHDZ 147
Page 1 and 2:
Features 80C52 Compatible - 8051 In
Page 3 and 4:
Block Diagram Figure 1. Block Diagr
Page 5 and 6:
Table 2. C51 Core SFRs 4289A-8051-0
Page 7 and 8:
Table 8. PCA SFRs 4289A-8051-09/03
Page 9 and 10:
Table 13. SFR Mapping F8h F0h E8h E
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11 AT89C51ID2 4289A-8051-09/03 50 4
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Table 14. Pin Description (Continue
Page 15 and 16:
Oscillators 4289A-8051-09/03 AT89C5
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4289A-8051-09/03 Table 18. PCON Reg
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4289A-8051-09/03 AT89C51ID2 It is a
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4289A-8051-09/03 - FCLK CPU and FCL
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Figure 5. Mode Switching Waveforms
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4289A-8051-09/03 Table 21. CKCON1 R
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4289A-8051-09/03 Table 22. AUXR1 re
Page 29 and 30:
Expanded RAM (XRAM) Figure 7. Inter
Page 31 and 32:
Registers Table 23. AUXR Register A
Page 33 and 34:
Reset Output 4289A-8051-09/03 AT89C
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Figure 12. Power Fail Detect Vcc 42
Page 37 and 38:
Programmable Clock- Output 4289A-80
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Registers Table 24. T2CON Register
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Programmable Counter Array PCA 4289
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4289A-8051-09/03 Table 26. CMOD Reg
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Figure 16. PCA Interrupt System 428
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4289A-8051-09/03 Table 29. PCA Modu
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4289A-8051-09/03 AT89C51ID2 PCA Cap
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Figure 19. PCA High Speed Output Mo
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4289A-8051-09/03 AT89C51ID2 Serial
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4289A-8051-09/03 AT89C51ID2 The SAD
Page 57 and 58:
Internal Baud Rate Generator (BRG)
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UART Registers Table 40. SADEN Regi
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4289A-8051-09/03 Table 44. T2CON Re
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4289A-8051-09/03 Table 46. BDRCON R
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4289A-8051-09/03 AT89C51ID2 Registe
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4289A-8051-09/03 Table 49. IPL0 Reg
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4289A-8051-09/03 Table 51. IEN1 Reg
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4289A-8051-09/03 Table 54. IPH1 Reg
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Power Management 4289A-8051-09/03 A
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4289A-8051-09/03 AT89C51ID2 pins, t
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AT89C51ID2 Keyboard Interface The A
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4289A-8051-09/03 Table 59. KBE Regi
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4289A-8051-09/03 AT89C51ID2 2-wire
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4289A-8051-09/03 AT89C51ID2 Descrip
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4289A-8051-09/03 AT89C51ID2 When th
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Figure 33. Format and State in the
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Page 91 and 92:
Page 93 and 94:
Table 67. Status in Slave Receiver
Page 95 and 96: Table 68. Status in Slave Transmitt
Page 97 and 98: 4289A-8051-09/03 Bit Number 1 SD1 A
Page 99 and 100: Serial Port Interface (SPI) 4289A-8
Page 101 and 102: Functional Description Figure 38 sh
Page 103 and 104: Figure 40. Data Transmission Format
Page 105 and 106: 4289A-8051-09/03 Figure 43. SPI Int
Page 107 and 108: Serial Peripheral DATa register (SP
Page 109 and 110: WDT During Power Down and Idle 4289
Page 111 and 112: 4289A-8051-09/03 AT89C51ID2 Power-o
Page 113 and 114: 4289A-8051-09/03 Figure 44. Recomme
Page 115 and 116: Registers Table 85. EECON Register
Page 117 and 118: 4289A-8051-09/03 AT89C51ID2 Flash M
Page 119 and 120: 4289A-8051-09/03 Table 88. Program
Page 121 and 122: 4289A-8051-09/03 Table 92. Program
Page 123 and 124: Functional Description Figure 48. B
Page 125 and 126: Boot Process Figure 49. Bootloader
Page 127 and 128: Functional Description 4289A-8051-0
Page 129 and 130: Flow Description 4289A-8051-09/03 A
Page 131 and 132: Write / Program Commands This flow
Page 133 and 134: Display Data Description Figure 55.
Page 135 and 136: Example 4289A-8051-09/03 Read funct
Page 137 and 138: 4289A-8051-09/03 Table 95. ISP Comm
Page 139 and 140: Table 96. API Call Summary (Continu
Page 141 and 142: T A = -40°C to +85°C; V SS = 0V;
Page 143 and 144: External Program Memory Characteris
Page 145: External Program Memory Read Cycle
Page 149 and 150: AC Testing Input/Output Waveforms F
Page 151 and 152: Ordering Information 4289A-8051-09/
Page 153 and 154: VQFP44 4289A-8051-09/03 AT89C51ID2
Page 155 and 156: PLCC68 4289A-8051-09/03 AT89C51ID2
Page 157 and 158: 4289A-8051-09/03 AT89C51ID2 Pulse W
Page 159: Atmel Corporation Atmel Operations
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Atmel AT89C51ID2 Data Sheet - Keil

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