Atmel AT89C51ID2 Data Sheet - Keil

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2 AT89C51ID2 The 64 Kbytes Flash memory can be programmed either in parallel mode or in serial mode with the ISP capability or with software. The programming voltage is internally generated from the standard VCC pin. The AT89C51ID2 retains all features of the Atmel 80C52 with 256 bytes of internal RAM, a 10-source 4-level interrupt controller and three timer/counters. In addition, the AT89C51ID2 has a Programmable Counter Array, an XRAM of 1792 bytes, a Hardware Watchdog Timer, SPI and Keyboard, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a speed improvement mechanism (X2 mode). The fully static design of the AT89C51ID2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The AT89C51ID2 has 2 software-selectable modes of reduced activity and 8-bit clock prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. The added features of the AT89C51ID2 make it more powerful for applications that need pulse width modulation, high speed I/O and counting capabilities such as alarms, motor control, corded phones, smart card readers. Table 1. Memory Size and I/O pins AT89C51ID2 Flash (bytes) XRAM (bytes) TOTAL RAM (bytes) I/O PLCC44/VQFP44 64K 1792 2048 34 PLCC68/VQFP64 (1) 64K 1792 2048 50 1. For PLCC68 and VQFP64 packages, please contact Atmel sales office for availability. 4289A–8051–09/03
Block Diagram Figure 1. Block Diagram 4289A–8051–09/03 XTALA1 XTALA2 XTALB1(1) XTALB2 ALE/ PROG PSEN EA RD WR (2) (2) CPU RESET RxD TxD EUART RAM 256x8 Timer 0 INT Timer 1 Ctrl T0 T1 C51 CORE (2) (2) (2) (2) INT0 INT1 IB-bus VCC Vss (2) (2) (1) (1) (1) (1) Flash 64Kx8 XRAM 1792 x 8 PCA Timer2 Watch Dog Keyboard POR PFD Port 0 Port 1Port 2 Port 3 Port4 Port 5 P0 P1 P2 (1): Alternate function of Port 1 (2): Alternate function of Port 3 (3): Alternate function of Port I2 P3 ECI P4 PCA T2EX T2 Keyboard Parallel I/O Ports & External Bus SPI TWI P5 AT89C51ID2 (1) (3) (3) (1) (1)(1)(1) SDA SCL MISO MOSI SCK SS BOOT 2K x8 ROM E² DATA 2K x 8 Regulator POR / PFD 3
Page 1: Features 80C52 Compatible - 8051 In
Page 5 and 6: Table 2. C51 Core SFRs 4289A-8051-0
Page 7 and 8: Table 8. PCA SFRs 4289A-8051-09/03
Page 9 and 10: Table 13. SFR Mapping F8h F0h E8h E
Page 11 and 12: 11 AT89C51ID2 4289A-8051-09/03 50 4
Page 13 and 14: Table 14. Pin Description (Continue
Page 15 and 16: Oscillators 4289A-8051-09/03 AT89C5
Page 17 and 18: 4289A-8051-09/03 Table 18. PCON Reg
Page 19 and 20: 4289A-8051-09/03 AT89C51ID2 It is a
Page 21 and 22: 4289A-8051-09/03 - FCLK CPU and FCL
Page 23 and 24: Figure 5. Mode Switching Waveforms
Page 25 and 26: 4289A-8051-09/03 Table 21. CKCON1 R
Page 27 and 28: 4289A-8051-09/03 Table 22. AUXR1 re
Page 29 and 30: Expanded RAM (XRAM) Figure 7. Inter
Page 31 and 32: Registers Table 23. AUXR Register A
Page 33 and 34: Reset Output 4289A-8051-09/03 AT89C
Page 35 and 36: Figure 12. Power Fail Detect Vcc 42
Page 37 and 38: Programmable Clock- Output 4289A-80
Page 39 and 40: Registers Table 24. T2CON Register
Page 41 and 42: Programmable Counter Array PCA 4289
Page 43 and 44: 4289A-8051-09/03 Table 26. CMOD Reg
Page 45 and 46: Figure 16. PCA Interrupt System 428
Page 47 and 48: 4289A-8051-09/03 Table 29. PCA Modu
Page 49 and 50: 4289A-8051-09/03 AT89C51ID2 PCA Cap
Page 51 and 52: Figure 19. PCA High Speed Output Mo
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4289A-8051-09/03 AT89C51ID2 Serial
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4289A-8051-09/03 AT89C51ID2 The SAD
Page 57 and 58:
Internal Baud Rate Generator (BRG)
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UART Registers Table 40. SADEN Regi
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4289A-8051-09/03 Table 44. T2CON Re
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4289A-8051-09/03 Table 46. BDRCON R
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4289A-8051-09/03 AT89C51ID2 Registe
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4289A-8051-09/03 Table 49. IPL0 Reg
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4289A-8051-09/03 Table 51. IEN1 Reg
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4289A-8051-09/03 Table 54. IPH1 Reg
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Power Management 4289A-8051-09/03 A
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4289A-8051-09/03 AT89C51ID2 pins, t
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AT89C51ID2 Keyboard Interface The A
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4289A-8051-09/03 Table 59. KBE Regi
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4289A-8051-09/03 AT89C51ID2 2-wire
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4289A-8051-09/03 AT89C51ID2 Descrip
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4289A-8051-09/03 AT89C51ID2 When th
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Figure 33. Format and State in the
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Page 91 and 92:
Page 93 and 94:
Table 67. Status in Slave Receiver
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Table 68. Status in Slave Transmitt
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4289A-8051-09/03 Bit Number 1 SD1 A
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Serial Port Interface (SPI) 4289A-8
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Functional Description Figure 38 sh
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Figure 40. Data Transmission Format
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4289A-8051-09/03 Figure 43. SPI Int
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Serial Peripheral DATa register (SP
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WDT During Power Down and Idle 4289
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4289A-8051-09/03 AT89C51ID2 Power-o
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4289A-8051-09/03 Figure 44. Recomme
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Registers Table 85. EECON Register
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4289A-8051-09/03 AT89C51ID2 Flash M
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4289A-8051-09/03 Table 88. Program
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4289A-8051-09/03 Table 92. Program
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Functional Description Figure 48. B
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Boot Process Figure 49. Bootloader
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Functional Description 4289A-8051-0
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Flow Description 4289A-8051-09/03 A
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Write / Program Commands This flow
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Display Data Description Figure 55.
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Example 4289A-8051-09/03 Read funct
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4289A-8051-09/03 Table 95. ISP Comm
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Table 96. API Call Summary (Continu
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T A = -40°C to +85°C; V SS = 0V;
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External Program Memory Characteris
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External Program Memory Read Cycle
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External Data Memory Write Cycle 42
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AC Testing Input/Output Waveforms F
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Ordering Information 4289A-8051-09/
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VQFP44 4289A-8051-09/03 AT89C51ID2
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PLCC68 4289A-8051-09/03 AT89C51ID2
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4289A-8051-09/03 AT89C51ID2 Pulse W
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Atmel Corporation Atmel Operations
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Atmel AT89C51ID2 Data Sheet - Keil

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