Atmel AT89C51ID2 Data Sheet - Keil

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Shift Register Timing Waveforms INSTRUCTION ALE CLOCK External Clock Drive Waveforms 148 <strong>AT89C51ID2</strong> Table 104. AC Parameters for a Fix Clock Symbol Table 105. AC Parameters for a Variable Clock -M -L Min Max Min Max T XLXL 300 300 ns T QVHX 200 200 ns T XHQX 30 30 ns T XHDX 0 0 ns T XHDV 117 117 ns Symbol Type Standard Clock X2 Clock X Parameter For -M Range X Parameter For -L Range Units T XLXL Min 12 T 6 T ns T QVHX Min 10 T - x 5 T - x 50 50 ns T XHQX Min 2 T - x T - x 20 20 ns T XHDX Min x x 0 0 ns T XHDV Max 10 T - x 5 T- x 133 133 ns 0 1 2 3 4 5 6 7 8 OUTPUT DATA 0 1 2 3 4 5 6 7 WRITE to SBUF TXHDV TXHDX SET TI INPUT DATA VALID VALID VALID VALID VALID VALID VALID VALID CLEAR RI T QVXH T XLXL V CC -0.5V 0.45V T XHQX 0.7V CC 0.2V CC -0.1 T CHCL T CLCX T CLCL T CHCX T CLCH SET RI Units 4289A–8051–09/03
AC Testing Input/Output Waveforms Float Waveforms 4289A–8051–09/03 INPUT/OUTPUT V CC -0.5V 0.2 V CC + 0.9 0.2 V CC - 0.1 <strong>AT89C51ID2</strong> AC inputs during testing are driven at V CC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing measurement are made at V IH min for a logic “1” and V IL max for a logic “0”. For timing purposes as port pin is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded V OH /V OL level occurs. I OL /I OH ≥ ± 20 mA. Clock Waveforms Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2. 0.45V V OH - 0.1V V OL + 0.1V FLOAT V LOAD V LOAD + 0.1V V LOAD - 0.1V 149
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Features 80C52 Compatible - 8051 In
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Block Diagram Figure 1. Block Diagr
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Table 2. C51 Core SFRs 4289A-8051-0
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Table 8. PCA SFRs 4289A-8051-09/03
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Table 13. SFR Mapping F8h F0h E8h E
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11 AT89C51ID2 4289A-8051-09/03 50 4
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Table 14. Pin Description (Continue
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Oscillators 4289A-8051-09/03 AT89C5
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4289A-8051-09/03 Table 18. PCON Reg
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4289A-8051-09/03 AT89C51ID2 It is a
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4289A-8051-09/03 - FCLK CPU and FCL
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Figure 5. Mode Switching Waveforms
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4289A-8051-09/03 Table 21. CKCON1 R
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4289A-8051-09/03 Table 22. AUXR1 re
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Expanded RAM (XRAM) Figure 7. Inter
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Registers Table 23. AUXR Register A
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Reset Output 4289A-8051-09/03 AT89C
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Figure 12. Power Fail Detect Vcc 42
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Programmable Clock- Output 4289A-80
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Registers Table 24. T2CON Register
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Programmable Counter Array PCA 4289
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4289A-8051-09/03 Table 26. CMOD Reg
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Figure 16. PCA Interrupt System 428
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4289A-8051-09/03 Table 29. PCA Modu
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4289A-8051-09/03 AT89C51ID2 PCA Cap
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Figure 19. PCA High Speed Output Mo
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4289A-8051-09/03 AT89C51ID2 Serial
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4289A-8051-09/03 AT89C51ID2 The SAD
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Internal Baud Rate Generator (BRG)
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UART Registers Table 40. SADEN Regi
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4289A-8051-09/03 Table 44. T2CON Re
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4289A-8051-09/03 Table 46. BDRCON R
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4289A-8051-09/03 AT89C51ID2 Registe
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4289A-8051-09/03 Table 49. IPL0 Reg
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4289A-8051-09/03 Table 51. IEN1 Reg
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4289A-8051-09/03 Table 54. IPH1 Reg
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Power Management 4289A-8051-09/03 A
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4289A-8051-09/03 AT89C51ID2 pins, t
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AT89C51ID2 Keyboard Interface The A
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4289A-8051-09/03 Table 59. KBE Regi
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4289A-8051-09/03 AT89C51ID2 2-wire
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4289A-8051-09/03 AT89C51ID2 Descrip
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4289A-8051-09/03 AT89C51ID2 When th
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Figure 33. Format and State in the
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Table 67. Status in Slave Receiver
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Table 68. Status in Slave Transmitt
Page 97 and 98: 4289A-8051-09/03 Bit Number 1 SD1 A
Page 99 and 100: Serial Port Interface (SPI) 4289A-8
Page 101 and 102: Functional Description Figure 38 sh
Page 103 and 104: Figure 40. Data Transmission Format
Page 105 and 106: 4289A-8051-09/03 Figure 43. SPI Int
Page 107 and 108: Serial Peripheral DATa register (SP
Page 109 and 110: WDT During Power Down and Idle 4289
Page 111 and 112: 4289A-8051-09/03 AT89C51ID2 Power-o
Page 113 and 114: 4289A-8051-09/03 Figure 44. Recomme
Page 115 and 116: Registers Table 85. EECON Register
Page 117 and 118: 4289A-8051-09/03 AT89C51ID2 Flash M
Page 119 and 120: 4289A-8051-09/03 Table 88. Program
Page 121 and 122: 4289A-8051-09/03 Table 92. Program
Page 123 and 124: Functional Description Figure 48. B
Page 125 and 126: Boot Process Figure 49. Bootloader
Page 127 and 128: Functional Description 4289A-8051-0
Page 129 and 130: Flow Description 4289A-8051-09/03 A
Page 131 and 132: Write / Program Commands This flow
Page 133 and 134: Display Data Description Figure 55.
Page 135 and 136: Example 4289A-8051-09/03 Read funct
Page 137 and 138: 4289A-8051-09/03 Table 95. ISP Comm
Page 139 and 140: Table 96. API Call Summary (Continu
Page 141 and 142: T A = -40°C to +85°C; V SS = 0V;
Page 143 and 144: External Program Memory Characteris
Page 145 and 146: External Program Memory Read Cycle
Page 147: External Data Memory Write Cycle 42
Page 151 and 152: Ordering Information 4289A-8051-09/
Page 153 and 154: VQFP44 4289A-8051-09/03 AT89C51ID2
Page 155 and 156: PLCC68 4289A-8051-09/03 AT89C51ID2
Page 157 and 158: 4289A-8051-09/03 AT89C51ID2 Pulse W
Page 159: Atmel Corporation Atmel Operations
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Atmel AT89C51ID2 Data Sheet - Keil

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