FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series (Continued) Address 0001C8H Register + 0 + 1 + 2 + 3 TMRLR3 [W] XXXXXXXX XXXXXXXX 0001CCH Reserved 0001D0H TMRLR4 [W] XXXXXXXX XXXXXXXX 0001D4H Reserved 0001D8H TMRLR5 [W] XXXXXXXX XXXXXXXX 0001DCH Reserved 0001E0H TMRLR6 [W] XXXXXXXX XXXXXXXX 0001E4H Reserved 0001E8H TMRLR7 [W] XXXXXXXX XXXXXXXX 0001ECH Reserved 0001F0H 0001F4H 0001F8H 0001FCH TCDT0 [R/W] XXXXXXXX XXXXXXXX TCDT1 [R/W] XXXXXXXX XXXXXXXX TCDT2 [R/W] XXXXXXXX XXXXXXXX TCDT3 [R/W] XXXXXXXX XXXXXXXX Block TMR3 [R] XXXXXXXX XXXXXXXX Reload Timer 3 TMCSRH3 [R/W] - - - 00000 TMCSRL3 [R/W] 0 - 000000 (PPG 6, PPG 7) TMR4 [R] XXXXXXXX XXXXXXXX Reload Timer 4 TMCSRH4 [R/W] - - - 00000 TMCSRL4 [R/W] 0 - 000000 (PPG 8, PPG 9) TMR5 [R] XXXXXXXX XXXXXXXX Reload Timer 5 TMCSRH5 [R/W] - - - 00000 TMCSRL5 [R/W] 0 - 000000 (PPG 10, PPG 11) TMR6 [R] XXXXXXXX XXXXXXXX Reload Timer 6 TMCSRH6 [R/W] - - - 00000 TMCSRL6 [R/W] 0 - 000000 TMR7 [R] XXXXXXXX XXXXXXXX TMCSRH7 [R/W] - - - 00000 Reserved Reserved Reserved Reserved TMCSRL7 [R/W] 0 - 000000 TCCS0 [R/W] 00000000 TCCS1 [R/W] 00000000 TCCS2 [R/W] 00000000 TCCS3 [R/W] 00000000 (PPG 12, PPG 13) Reload Timer 7 (PPG 14, PPG 15) (A/D Converter) Free Running Timer 0 (ICU 0, ICU 1) Free Running Timer 1 (ICU 2, ICU 3) Free Running Timer 2 (OCU 0, OCU 1) Free Running Timer 3 (OCU 2, OCU 3) (Continued) 114 DS705-00002-1v3-E
(Continued) Address 000200H 000204H 000208H 00020CH 000210H 000214H 000218H 00021CH 000220H 000224H 000228H to 00023CH 000240H 000244H to 0002CCH Register + 0 + 1 + 2 + 3 DMACA0 [R/W] 00000000 0000XXXX XXXXXXXX XXXXXXXX DMACR [R/W] 00 - - 0000 0002D0H Reserved 0002D4H 0002D8H 0002DCH to 0002ECH 0002F0H DMACB0 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX DMACA1 [R/W] 00000000 0000XXXX XXXXXXXX XXXXXXXX DMACB1 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX DMACA2 [R/W] 00000000 0000XXXX XXXXXXXX XXXXXXXX DMACB2 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX DMACA3 [R/W] 00000000 0000XXXX XXXXXXXX XXXXXXXX DMACB3 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX DMACA4 [R/W] 00000000 0000XXXX XXXXXXXX XXXXXXXX DMACB4 [R/W] 00000000 00000000 XXXXXXXX XXXXXXXX ICS045 [R/W] 00000000 IPCP4 [R] XXXXXXXX XXXXXXXX IPCP6 [R] XXXXXXXX XXXXXXXX TCDT4 [R/W] XXXXXXXX XXXXXXXX Reserved Reserved MB91460E Series Block DMAC Reserved Reserved Reserved ICS67 [R/W] 00000000 IPCP5 [R] XXXXXXXX XXXXXXXX IPCP7 [R] XXXXXXXX XXXXXXXX Input Capture 4 to 7 Reserved Reserved Reserved TCCS4 [R/W] 00000000 Free Running Timer 4 (ICU 4, ICU 5) (Continued) DS705-00002-1v3-E 115
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FUJITSU SEMICONDUCTOR DATA SHEET 32
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MB91460E Series (Continued) • Rea
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MB91460E Series Sound Generator 1 c
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MB91460E Series DS705-00002-1v3-E 7
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(Continued) Pin no. Pin name I/O 66
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Page 13 and 14:
Page 15 and 16:
2. Power supply/Ground pins MB91460
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Type Circuit Remarks MB91460E Serie
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Type Circuit Remarks G Mask ROM and
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Type Circuit Remarks M CMOS level t
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(Continued) Example of using opposi
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■ NOTES ON DEBUGGER 1. Execution
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■ A/D CONVERTER / RANGE COMPARATO
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3. Block Diagram of A/D Converter T
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1. On MB91F467E, ADC1 does not exis
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• ADCS1 : Access: Half-word, Byte
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MB91460E Series [bit 9] STRT (Start
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4.2. Common Data Register (ADCR1, A
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4.5. A/D Channel Setting Register (
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5.2. Range Comparator Registers The
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5.2.3. Inverted Range Selection reg
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MB91460E Series The interrupt condi
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6. Operation of A/D Converter MB914
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6.5. Scan Conversion The following
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MB91460E Series The automatic inter
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■ CLOCK SUPERVISOR (New Feature)
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2.1. Clock Supervisor Control Regis
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3. Block Diagram Clock Supervisor M
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MB91460E Series Figure 0-4 Timing D
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MB91460E Series Figure 0-6 Timing D
Page 63 and 64: MB91460E Series Figure 0-8 Timing D
Page 65 and 66: 4.3. Re-enabling the RC-oscillator
Page 67 and 68: MB91460E Series Figure 0-11 Timing
Page 69 and 70: Timing Diagram: Waking up from Sub
Page 71 and 72: 4.9. RTC mode (STOP mode with Real
Page 73 and 74: 4.11. Check if reset was asserted b
Page 75 and 76: ■ MB91460E Series DS705-00002-1v3
Page 77 and 78: 2. Standby RAM MB91460E Series MB91
Page 79 and 80: 3.3. EXTE: Shutdown recovery extern
Page 81 and 82: [bit 1] RTCF: Real Time Clock recov
Page 83 and 84: 3.6. EXTLV1/2: Shutdown recovery ex
Page 85 and 86: 4.1.3. Shutdown with Real Time Cloc
Page 87 and 88: 4.1.8. External Interrupts: Level o
Page 89 and 90: 4.3. Determining the Reset Source a
Page 91 and 92: 4.5. I/O Behaviour in Shutdown Duri
Page 93 and 94: 3. Programming model 3.1. Basic pro
Page 95 and 96: 4.3. CCR (Condition Code Register)
Page 97 and 98: ■ EMBEDDED PROGRAM/DATA MEMORY (F
Page 99 and 100: 3.2. Flash access timing settings i
Page 101 and 102: 4. Parallel Flash programming mode
Page 103 and 104: 5. Poweron Sequence in parallel pro
Page 105 and 106: 6.3. Security Vector FSV2 MB91460E
Page 107 and 108: ■ MEMORY MAPS 1. MB91F467EA 00000
Page 109 and 110: Address 000000H 000004H 000008H Reg
Page 111 and 112: (Continued) Address 0000A0H Registe
Page 113: (Continued) Address 000180H Reserve
Page 117 and 118: (Continued) Address 000348H 00034CH
Page 119 and 120: (Continued) Address 00048CH 000490H
Page 121 and 122: (Continued) Address + 0 + 1 Registe
Page 123 and 124: Address 000704H 000708H 00070CH 000
Page 125 and 126: (Continued) Address 000D80H 000D84H
Page 127 and 128: (Continued) Address 000E80H 000E84H
Page 129 and 130: (Continued) Address 002000H to 006F
Page 131 and 132: (Continued) Address 00C080H 00C084H
Page 133 and 134: (Continued) Address 00C1A0H 00C1A4H
Page 135 and 136: Address 00F09CH 00F0A0H 00F0A4H 00F
Page 137 and 138: 32bit read/write dat[31:0] dat[31:0
Page 139 and 140: (Continued) Interrupt Decimal Inter
Page 141 and 142: (Continued) Interrupt Decimal Inter
Page 143 and 144: ■ RECOMMENDED SETTINGS 1. PLL and
Page 145 and 146: MB91460E Series (Continued) Modulat
Page 147 and 148: MB91460E Series (Continued) Modulat
Page 149 and 150: (Continued) Modulation Degree (k) R
Page 151 and 152: “H” level average output curren
Page 153 and 154: 2. Recommended operating conditions
Page 155 and 156: 3. DC characteristics MB91460E Seri
Page 157 and 158: Parameter Symbol Analog inputleakag
Page 159 and 160: MB91460E Series 4. A/D converter ch
Page 161 and 162: Digital output 3FFH 3FEH 3FDH 004H
Page 163 and 164: 5. Alarm comparator characteristics
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7. AC characteristics 7.1. Clock ti
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7.3. LIN-USART Timings at VDD5 = 3.
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7.4. I 2 C AC Timings at VDD5 = 3.0
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7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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