FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series (Continued) Pin no. Pin name I/O 178 179 180 181 184 185 186 187 189 190 191 192 to 199 200 to 207 I/O circuit type *1 Function P25_0 General-purpose input/output port I/O E SMC1P4 Controller output pin of Stepper motor P25_1 General-purpose input/output port I/O E SMC1M4 Controller output pin of Stepper motor P25_2 General-purpose input/output port I/O E SMC2P4 Controller output pin of Stepper motor P25_3 General-purpose input/output port I/O E SMC2M4 Controller output pin of Stepper motor P25_4 General-purpose input/output port I/O E SMC1P5 Controller output pin of Stepper motor P25_5 General-purpose input/output port I/O E SMC1M5 Controller output pin of Stepper motor P25_6 General-purpose input/output port I/O E SMC2P5 Controller output pin of Stepper motor P25_7 General-purpose input/output port I/O E SMC2M5 Controller output pin of Stepper motor P13_0 General-purpose input/output port I/O A DREQ0 DMA external transfer request input P13_1 General-purpose input/output port I/O A DACKX0 DMA external transfer acknowledge output pin P13_2 General-purpose input/output port DEOTX0 I/O A DMA external transfer EOT (End of Track) output pin DEOP0 DMA external transfer EOP (End of Process) output pin P03_0 to P03_7 General-purpose input/output ports I/O A D0 to D7 Signal pins of external data bus (bit0 to bit7) P02_0 to P02_7 General-purpose input/output ports I/O A D8 to D15 Signal pins of external data bus (bit8 to bit15) *1 : For information about the I/O circuit type, refer to “■ I/O CIRCUIT TYPES”. *2 : Difference versus MB91460D series: At pins 95+96, RX2 and TX2 of CAN2 are removed. 14 DS705-00002-1v3-E
2. Power supply/Ground pins MB91460E Series Pin no. Pin name I/O Function 1, 27, 53, 69, 79, 105, 131, 157, 188 VSS5 Ground pins 163, 173, 183 HVSS5 Ground pins for Stepper motor controller 26, 52, 208 VDD35 Power supply pins for external data bus 78, 104, 130, 156 VDD5 Power supply pins 162, 172, 182 HVDD5 Supply Power supply pins for Stepper motor controller 81, 82 VDD5R Power supply pins for internal regulator 144 AVSS5 Analog ground pin for A/D converter 146 AVCC5 Power supply pin for A/D converter 145 AVRH5 Reference power supply pin for A/D converter 80 VCC18C Capacitor connection pin for internal regulator DS705-00002-1v3-E 15
Page 1 and 2: FUJITSU SEMICONDUCTOR DATA SHEET 32
Page 3 and 4: MB91460E Series (Continued) • Rea
Page 5 and 6: MB91460E Series Sound Generator 1 c
Page 7 and 8: MB91460E Series DS705-00002-1v3-E 7
Page 9 and 10: (Continued) Pin no. Pin name I/O 66
Page 11 and 12: (Continued) Pin no. Pin name I/O 10
Page 13: (Continued) Pin no. Pin name I/O 16
Page 17 and 18: Type Circuit Remarks MB91460E Serie
Page 19 and 20: Type Circuit Remarks G Mask ROM and
Page 21 and 22: Type Circuit Remarks M CMOS level t
Page 23 and 24: (Continued) Example of using opposi
Page 25 and 26: ■ NOTES ON DEBUGGER 1. Execution
Page 27 and 28: ■ A/D CONVERTER / RANGE COMPARATO
Page 29 and 30: 3. Block Diagram of A/D Converter T
Page 31 and 32: 1. On MB91F467E, ADC1 does not exis
Page 33 and 34: • ADCS1 : Access: Half-word, Byte
Page 35 and 36: MB91460E Series [bit 9] STRT (Start
Page 37 and 38: 4.2. Common Data Register (ADCR1, A
Page 39 and 40: 4.5. A/D Channel Setting Register (
Page 41 and 42: 5.2. Range Comparator Registers The
Page 43 and 44: 5.2.3. Inverted Range Selection reg
Page 45 and 46: MB91460E Series The interrupt condi
Page 47 and 48: 6. Operation of A/D Converter MB914
Page 49 and 50: 6.5. Scan Conversion The following
Page 51 and 52: MB91460E Series The automatic inter
Page 53 and 54: ■ CLOCK SUPERVISOR (New Feature)
Page 55 and 56: 2.1. Clock Supervisor Control Regis
Page 57 and 58: 3. Block Diagram Clock Supervisor M
Page 59 and 60: MB91460E Series Figure 0-4 Timing D
Page 65 and 66:
4.3. Re-enabling the RC-oscillator
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MB91460E Series Figure 0-11 Timing
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Timing Diagram: Waking up from Sub
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4.9. RTC mode (STOP mode with Real
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4.11. Check if reset was asserted b
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■ MB91460E Series DS705-00002-1v3
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2. Standby RAM MB91460E Series MB91
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3.3. EXTE: Shutdown recovery extern
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[bit 1] RTCF: Real Time Clock recov
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3.6. EXTLV1/2: Shutdown recovery ex
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4.1.3. Shutdown with Real Time Cloc
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4.1.8. External Interrupts: Level o
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4.3. Determining the Reset Source a
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4.5. I/O Behaviour in Shutdown Duri
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3. Programming model 3.1. Basic pro
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4.3. CCR (Condition Code Register)
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■ EMBEDDED PROGRAM/DATA MEMORY (F
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3.2. Flash access timing settings i
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4. Parallel Flash programming mode
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5. Poweron Sequence in parallel pro
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6.3. Security Vector FSV2 MB91460E
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■ MEMORY MAPS 1. MB91F467EA 00000
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Address 000000H 000004H 000008H Reg
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(Continued) Address 0000A0H Registe
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(Continued) Address 000180H Reserve
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(Continued) Address 000200H 000204H
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(Continued) Address 000348H 00034CH
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(Continued) Address 00048CH 000490H
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(Continued) Address + 0 + 1 Registe
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Address 000704H 000708H 00070CH 000
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(Continued) Address 000D80H 000D84H
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(Continued) Address 000E80H 000E84H
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(Continued) Address 002000H to 006F
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(Continued) Address 00C080H 00C084H
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(Continued) Address 00C1A0H 00C1A4H
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Address 00F09CH 00F0A0H 00F0A4H 00F
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32bit read/write dat[31:0] dat[31:0
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(Continued) Interrupt Decimal Inter
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(Continued) Interrupt Decimal Inter
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■ RECOMMENDED SETTINGS 1. PLL and
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MB91460E Series (Continued) Modulat
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MB91460E Series (Continued) Modulat
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(Continued) Modulation Degree (k) R
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“H” level average output curren
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2. Recommended operating conditions
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3. DC characteristics MB91460E Seri
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Parameter Symbol Analog inputleakag
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MB91460E Series 4. A/D converter ch
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Digital output 3FFH 3FEH 3FDH 004H
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5. Alarm comparator characteristics
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7. AC characteristics 7.1. Clock ti
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7.3. LIN-USART Timings at VDD5 = 3.
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7.4. I 2 C AC Timings at VDD5 = 3.0
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7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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