FR60 MB91460E Series - Microcontrollers - Fujitsu

6. Operation of A/D Converter
MB91460E Series
The A/D converter operates using the successive approximation method with 10-bit or 8-bit resolution. There is
one 16-bit register provided to store conversion results (ADCR), which is updated each time conversion completes.
Additionally, there is one ADC Channel Data register per channel (ADCD0...31), which is updated each
time the assigned channel is converted. The Channel Data registers especially improve the continous conversion
mode.
It is recommended to use the DMA service. The following describes the operation modes.
6.1. Single Mode
In single conversion mode, the analog input signals selected by the ANS bits and ANE bits are converted in
order until the completion of conversion on the end channel determined by the ANE bits. A/D conversion then
ends. If the start channel and end channel are the same (ANS=ANE), only a single channel conversion is
performed.
Examples:
• ANS=00000b, ANE=00011b
Start -> AN0 -> AN1 -> AN2 -> AN3 -> End
• ANS=00010b, ANE=00010b
Start -> AN2 -> End
6.2. Continuous Mode
In continuous mode the analog input signals selected by the ANS bits and ANE bits are converted in order until
the completion of conversion on the end channel determined by the ANE bits, then the converter returns to the
ANS channel for analog input and repeats the process continuously. When the start and end channels are the
same (ANS=ANE), conversion is performed continuously for that channel.
Examples:
• ANS=00000b, ANE=00011b
Start -> AN0 -> AN1 -> AN2 -> AN3 -> AN0 ... -> repeat
• ANS=00010b, ANE=00010b
Start -> AN2 -> AN2 -> AN2 ... -> repeat
In continuous mode, conversion is repeated until '0' is written to the BUSY bit. (Writing '0' to the BUSY bit forcibly
stops the conversion operation.) Note that forcibly terminating operation halts the current conversion during midconversion.
(If operation is forcibly terminated, the value in the conversion register is the result of the most
recently completed conversion.)
6.3. Stop Mode
In stop mode the analog input signal selected by the ANS bits and ANE bits are converted in order, but conversion
operation pauses after each channel. The pause is released by applying another start signal.
At the completion of conversion on the end channel determined by the ANE bits, the converter returns to the
ANS channel for analog input signal and repeats the conversion process continuously. When the start and end
channel are the same (ANS=ANE), only a signal channel conversion is performed.
Examples:
• ANS=00000b, ANE=00011b
Start -> AN0 -> stop -> start -> AN1 -> stop -> start -> AN2 -> stop -> start -> AN3 -> stop -> start -> AN0 ...
-> repeat
• ANS=00010b, ANE=00010b
Start -> AN2 -> stop -> start -> AN2 -> stop -> start -> AN2 ... -> repeat
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