FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series Address 000688H 00068CH RCO0H0 [R/W] 11111111 RCO0H2 [R/W] 1111111 RCO0L0 [R/W] 0000 0000 RCO0L2 [R/W] 0000 0000 RCO0H1 [R/W] 1111111 RCO0H3 [R/W] 1111111 000690H RCO0IRS [R/W] 00000000 00000000 00000000 00000000 000694H RCO0OF [R] 00000000 00000000 00000000 00000000 000698H RCO0INT [R/W0] 00000000 00000000 00000000 00000000 00069CH reserved 0006A0H 0006A4H 0006A8H 0006ACH 0006B0H 0006B4H to 0006DCH 0006E0H 0006E4H 0006E8H 0006ECH 0006F0H 0006F4H 0006F8H 0006FCH 000700H AD0CC0 [R/W] 0000 0000 AD0CC4 [R/W] 0000 0000 AD0CC8 [R/W] 0000 0000 AD0CC12 [R/W] 0000 0000 AD0CS2 [RW] 0000 - - 00 AD0CC1 [R/W] 0000 0000 AD0CC5 [R/W] 0000 0000 AD0CC9 [R/W] 0000 0000 AD0CC13 [R/W] 0000 0000 ADC0D0 [R] - - - - - - XX XXXXXXXX ADC0D2 [R] - - - - - - XX XXXXXXXX ADC0D4 [R] - - - - - - XX XXXXXXXX ADC0D6 [R] - - - - - - XX XXXXXXXX ADC0D8 [R] - - - - - - XX XXXXXXXX ADC0D10 [R] - - - - - - XX XXXXXXXX ADC0D12 [R] - - - - - - XX XXXXXXXX ADC0D14 [R] - - - - - - XX XXXXXXXX ADC0D16 [R] - - - - - - XX XXXXXXXX Register + 0 + 1 + 2 + 3 Reserved AD0CC2 [R/W] 0000 0000 AD0CC6 [R/W] 0000 0000 AD0CC10 [R/W] 0000 0000 AD0CC14 [R/W] 0000 0000 reserved RCO0L1 [R/W] 0000 0000 RCO0L3 [R/W] 0000 0000 AD0CC3 [R/W] 0000 0000 AD0CC7 [R/W] 0000 0000 AD0CC11 [R/W] 0000 0000 AD0CC15 [R/W] 0000 0000 ADC0D1 [R] - - - - - - XX XXXXXXXX ADC0D3 [R] - - - - - - XX XXXXXXXX ADC0D5 [R] - - - - - - XX XXXXXXXX ADC0D7 [R] - - - - - - XX XXXXXXXX ADC0D9 [R] - - - - - - XX XXXXXXXX ADC0D11 [R] - - - - - - XX XXXXXXXX ADC0D13 [R] - - - - - - XX XXXXXXXX ADC0D015 [R] - - - - - - XX XXXXXXXX ADC0D17 [R] - - - - - - XX XXXXXXXX Block A/D Converter 0 Range Comparator A/D Converter 0 Channel Control A/D Converter 0 Control register 2 A/D Converter 0 Channel Data registers 122 DS705-00002-1v3-E
Address 000704H 000708H 00070CH 000710H 000714H 000718H 00071CH 000720H to 0007F8H ADC0D18 [R] - - - - - - XX XXXXXXXX ADC0D20 [R] - - - - - - XX XXXXXXXX ADC0D22 [R] - - - - - - XX XXXXXXXX ADC0D24 [R] - - - - - - XX XXXXXXXX ADC0D26 [R] - - - - - - XX XXXXXXXX ADC0D28 [R] - - - - - - XX XXXXXXXX ADC0D30 [R] - - - - - - XX XXXXXXXX Register + 0 + 1 + 2 + 3 Reserved ADC0D19 [R] - - - - - - XX XXXXXXXX ADC0D21 [R] - - - - - - XX XXXXXXXX ADC0D23 [R] - - - - - - XX XXXXXXXX ADC0D25 [R] - - - - - - XX XXXXXXXX ADC0D27 [R] - - - - - - XX XXXXXXXX ADC0D29 [R] - - - - - - XX XXXXXXXX ADC0D31 [R] - - - - - - XX XXXXXXXX MB91460E Series Block A/D Converter 0 Channel Data registers 0007FCH Reserved MODR [W] XXXXXXXX Reserved Mode Register 1. ACR0 [11 : 10] depends on bus width setting in Mode vector fetch information. 2. TCR [3 : 0] INIT value = 0000, keeps value after RST DS705-00002-1v3-E 123
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FUJITSU SEMICONDUCTOR DATA SHEET 32
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MB91460E Series (Continued) • Rea
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MB91460E Series Sound Generator 1 c
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MB91460E Series DS705-00002-1v3-E 7
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(Continued) Pin no. Pin name I/O 66
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Page 13 and 14:
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2. Power supply/Ground pins MB91460
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Type Circuit Remarks MB91460E Serie
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Type Circuit Remarks G Mask ROM and
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Type Circuit Remarks M CMOS level t
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(Continued) Example of using opposi
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■ NOTES ON DEBUGGER 1. Execution
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■ A/D CONVERTER / RANGE COMPARATO
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3. Block Diagram of A/D Converter T
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1. On MB91F467E, ADC1 does not exis
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• ADCS1 : Access: Half-word, Byte
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MB91460E Series [bit 9] STRT (Start
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4.2. Common Data Register (ADCR1, A
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4.5. A/D Channel Setting Register (
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5.2. Range Comparator Registers The
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5.2.3. Inverted Range Selection reg
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MB91460E Series The interrupt condi
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6. Operation of A/D Converter MB914
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6.5. Scan Conversion The following
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MB91460E Series The automatic inter
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■ CLOCK SUPERVISOR (New Feature)
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2.1. Clock Supervisor Control Regis
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3. Block Diagram Clock Supervisor M
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MB91460E Series Figure 0-4 Timing D
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4.3. Re-enabling the RC-oscillator
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MB91460E Series Figure 0-11 Timing
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Timing Diagram: Waking up from Sub
Page 71 and 72: 4.9. RTC mode (STOP mode with Real
Page 73 and 74: 4.11. Check if reset was asserted b
Page 75 and 76: ■ MB91460E Series DS705-00002-1v3
Page 77 and 78: 2. Standby RAM MB91460E Series MB91
Page 79 and 80: 3.3. EXTE: Shutdown recovery extern
Page 81 and 82: [bit 1] RTCF: Real Time Clock recov
Page 83 and 84: 3.6. EXTLV1/2: Shutdown recovery ex
Page 85 and 86: 4.1.3. Shutdown with Real Time Cloc
Page 87 and 88: 4.1.8. External Interrupts: Level o
Page 89 and 90: 4.3. Determining the Reset Source a
Page 91 and 92: 4.5. I/O Behaviour in Shutdown Duri
Page 93 and 94: 3. Programming model 3.1. Basic pro
Page 95 and 96: 4.3. CCR (Condition Code Register)
Page 97 and 98: ■ EMBEDDED PROGRAM/DATA MEMORY (F
Page 99 and 100: 3.2. Flash access timing settings i
Page 101 and 102: 4. Parallel Flash programming mode
Page 103 and 104: 5. Poweron Sequence in parallel pro
Page 105 and 106: 6.3. Security Vector FSV2 MB91460E
Page 107 and 108: ■ MEMORY MAPS 1. MB91F467EA 00000
Page 109 and 110: Address 000000H 000004H 000008H Reg
Page 111 and 112: (Continued) Address 0000A0H Registe
Page 113 and 114: (Continued) Address 000180H Reserve
Page 115 and 116: (Continued) Address 000200H 000204H
Page 117 and 118: (Continued) Address 000348H 00034CH
Page 119 and 120: (Continued) Address 00048CH 000490H
Page 121: (Continued) Address + 0 + 1 Registe
Page 125 and 126: (Continued) Address 000D80H 000D84H
Page 127 and 128: (Continued) Address 000E80H 000E84H
Page 129 and 130: (Continued) Address 002000H to 006F
Page 131 and 132: (Continued) Address 00C080H 00C084H
Page 133 and 134: (Continued) Address 00C1A0H 00C1A4H
Page 135 and 136: Address 00F09CH 00F0A0H 00F0A4H 00F
Page 137 and 138: 32bit read/write dat[31:0] dat[31:0
Page 139 and 140: (Continued) Interrupt Decimal Inter
Page 141 and 142: (Continued) Interrupt Decimal Inter
Page 143 and 144: ■ RECOMMENDED SETTINGS 1. PLL and
Page 145 and 146: MB91460E Series (Continued) Modulat
Page 147 and 148: MB91460E Series (Continued) Modulat
Page 149 and 150: (Continued) Modulation Degree (k) R
Page 151 and 152: “H” level average output curren
Page 153 and 154: 2. Recommended operating conditions
Page 155 and 156: 3. DC characteristics MB91460E Seri
Page 157 and 158: Parameter Symbol Analog inputleakag
Page 159 and 160: MB91460E Series 4. A/D converter ch
Page 161 and 162: Digital output 3FFH 3FEH 3FDH 004H
Page 163 and 164: 5. Alarm comparator characteristics
Page 165 and 166: 7. AC characteristics 7.1. Clock ti
Page 167 and 168: 7.3. LIN-USART Timings at VDD5 = 3.
Page 169 and 170: 7.4. I 2 C AC Timings at VDD5 = 3.0
Page 171 and 172: 7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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