FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series 5.2.2. A/D Converter Channel Control registers (ADCC0 to ADCC15) The A/D channel control registers serve 2 ADC channels per register and control the range comparision for these channels. ADCC0 register controls A/D channels 0 + 1, ADCC1 register controls A/D channels 2 + 3, ... ADCC15 register controls A/D channels 30 + 31 • ADCC0-15: Access: Word, Half-word, Byte 7 6 5 4 3 2 1 0 Bit RCOIE1 RCOE1 RCOS11 RCOS10 RCOIE0 RCOE0 RCOS01 RCOS00 0 0 0 0 0 0 0 0 Initial value R/W R/W R/W R/W R/W R/W R/W R/W Attribute Bits 7:4 control A/D channels 1,3,5,7,...31 Bits 3:0 control A/D channels 0,2,4,6,...,30 [bit 7,3] RCOIE1, RCOIE0 (Range Comparator Interrupt enable) The RCOIE bits enable the Range Comparator interrupt for the corresponding ADC channel. RCOIE Function 0 RCO interrupt for this ADC channel is disabled [default] 1 RCO interrupt for this ADC channel is enabled [bit 6,2] RCOE1, RCOE0 (Range Comparator operation enable) The RCOE bits enable the Range Comparision for the corresponding ADC channel: RCOE Function RCO disabled, 0 RCO flags for this ADC channel will not be set [default] 1 RCO enabled for this ADC channel [bits 5:4,1:0] RCOS1[1:0], RCOS0[1:0] (converter channel select) These bits select the A/D converter channel to be assigned to the Range Comparator channel: RCOS[1:0] Function 00 Select range comparator channel 0 for this ADC channel [default] 01 Select range comparator channel 1 for this ADC channel 10 Select range comparator channel 2 for this ADC channel 11 Select range comparator channel 3 for this ADC channel 42 DS705-00002-1v3-E
5.2.3. Inverted Range Selection register MB91460E Series The RCOIRS register controlles that the comparision should check for “out of range” or “inside range”. The 32 bits of RCOIRS is organized “per ADC channel”. ADC channel 0 is located on the MSB of the register and ADC channel 31 is on the LSB. • RCOIRS : Access: Word, Half-word, Byte 31 30 29 28 27 26 259 24 Bit RCOIRS0 RCOIRS1 RCOIRS2 RCOIRS3 RCOIRS4 RCOIRS5 RCOIRS6 RCOIRS7 0 0 0 0 0 0 0 0 Initial value R/W R/W R/W R/W R/W R/W R/W R/W Attribute 23 22 21 20 19 18 17 16 Bit RCOIRS8 RCOIRS9 RCOIRS10 RCOIRS11 RCOIRS12 RCOIRS13 RCOIRS14 RCOIRS15 0 0 0 0 0 0 0 0 Initial value R/W R/W R/W R/W R/W R/W R/W R/W Attribute 15 14 13 12 11 10 9 8 Bit RCOIRS16 RCOIRS17 RCOIRS18 RCOIRS19 RCOIRS20 RCOIRS21 RCOIRS22 RCOIRS23 0 0 0 0 0 0 0 0 Initial value R/W R/W R/W R/W R/W R/W R/W R/W Attribute 7 6 5 4 3 2 1 0 Bit RCOIRS24 RCOIRS25 RCOIRS26 RCOIRS27 RCOIRS28 RCOIRS29 RCOIRS30 RCOIRS31 0 0 0 0 0 0 0 0 Initial value R/W R/W R/W R/W R/W R/W R/W R/W Attribute Note that bit[31] is assigned to ADC channel 0, bit[30] is assigned to ADC channel one and so on. [bits 31:0] RCOIRS[0:31] (Inverted Range Select) The RCOIRS bits control how the Range Comparator result flags are set. • If the RCOIRS[n] is 0, the flags are set when the ADC result is above the upper threshold OR below the lower threshold. That is called “out of range” mode. • If the RCOIRS[n] is 1, the flags are set when the ADC result is below or equal the upper threshold AND above or equal the lower threshold. That is called “inside range” mode. RCOIRS Function n 0 Range comparision for this ADC channel checks for “out of range” (default) 1 Range comparision for this ADC channel checks for “inside range” DS705-00002-1v3-E 43
Page 1 and 2: FUJITSU SEMICONDUCTOR DATA SHEET 32
Page 3 and 4: MB91460E Series (Continued) • Rea
Page 5 and 6: MB91460E Series Sound Generator 1 c
Page 7 and 8: MB91460E Series DS705-00002-1v3-E 7
Page 9 and 10: (Continued) Pin no. Pin name I/O 66
Page 15 and 16: 2. Power supply/Ground pins MB91460
Page 17 and 18: Type Circuit Remarks MB91460E Serie
Page 19 and 20: Type Circuit Remarks G Mask ROM and
Page 21 and 22: Type Circuit Remarks M CMOS level t
Page 23 and 24: (Continued) Example of using opposi
Page 25 and 26: ■ NOTES ON DEBUGGER 1. Execution
Page 27 and 28: ■ A/D CONVERTER / RANGE COMPARATO
Page 29 and 30: 3. Block Diagram of A/D Converter T
Page 31 and 32: 1. On MB91F467E, ADC1 does not exis
Page 33 and 34: • ADCS1 : Access: Half-word, Byte
Page 35 and 36: MB91460E Series [bit 9] STRT (Start
Page 37 and 38: 4.2. Common Data Register (ADCR1, A
Page 39 and 40: 4.5. A/D Channel Setting Register (
Page 41: 5.2. Range Comparator Registers The
Page 45 and 46: MB91460E Series The interrupt condi
Page 47 and 48: 6. Operation of A/D Converter MB914
Page 49 and 50: 6.5. Scan Conversion The following
Page 51 and 52: MB91460E Series The automatic inter
Page 53 and 54: ■ CLOCK SUPERVISOR (New Feature)
Page 55 and 56: 2.1. Clock Supervisor Control Regis
Page 57 and 58: 3. Block Diagram Clock Supervisor M
Page 59 and 60: MB91460E Series Figure 0-4 Timing D
Page 65 and 66: 4.3. Re-enabling the RC-oscillator
Page 67 and 68: MB91460E Series Figure 0-11 Timing
Page 69 and 70: Timing Diagram: Waking up from Sub
Page 71 and 72: 4.9. RTC mode (STOP mode with Real
Page 73 and 74: 4.11. Check if reset was asserted b
Page 75 and 76: ■ MB91460E Series DS705-00002-1v3
Page 77 and 78: 2. Standby RAM MB91460E Series MB91
Page 79 and 80: 3.3. EXTE: Shutdown recovery extern
Page 81 and 82: [bit 1] RTCF: Real Time Clock recov
Page 83 and 84: 3.6. EXTLV1/2: Shutdown recovery ex
Page 85 and 86: 4.1.3. Shutdown with Real Time Cloc
Page 87 and 88: 4.1.8. External Interrupts: Level o
Page 89 and 90: 4.3. Determining the Reset Source a
Page 91 and 92: 4.5. I/O Behaviour in Shutdown Duri
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3. Programming model 3.1. Basic pro
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4.3. CCR (Condition Code Register)
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■ EMBEDDED PROGRAM/DATA MEMORY (F
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3.2. Flash access timing settings i
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4. Parallel Flash programming mode
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5. Poweron Sequence in parallel pro
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6.3. Security Vector FSV2 MB91460E
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■ MEMORY MAPS 1. MB91F467EA 00000
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Address 000000H 000004H 000008H Reg
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(Continued) Address 0000A0H Registe
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(Continued) Address 000180H Reserve
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(Continued) Address 000200H 000204H
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(Continued) Address 000348H 00034CH
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(Continued) Address 00048CH 000490H
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(Continued) Address + 0 + 1 Registe
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Address 000704H 000708H 00070CH 000
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(Continued) Address 000D80H 000D84H
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(Continued) Address 000E80H 000E84H
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(Continued) Address 002000H to 006F
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(Continued) Address 00C080H 00C084H
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(Continued) Address 00C1A0H 00C1A4H
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Address 00F09CH 00F0A0H 00F0A4H 00F
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32bit read/write dat[31:0] dat[31:0
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(Continued) Interrupt Decimal Inter
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(Continued) Interrupt Decimal Inter
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■ RECOMMENDED SETTINGS 1. PLL and
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MB91460E Series (Continued) Modulat
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MB91460E Series (Continued) Modulat
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(Continued) Modulation Degree (k) R
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“H” level average output curren
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2. Recommended operating conditions
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3. DC characteristics MB91460E Seri
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Parameter Symbol Analog inputleakag
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MB91460E Series 4. A/D converter ch
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Digital output 3FFH 3FEH 3FDH 004H
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5. Alarm comparator characteristics
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7. AC characteristics 7.1. Clock ti
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7.3. LIN-USART Timings at VDD5 = 3.
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7.4. I 2 C AC Timings at VDD5 = 3.0
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7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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