FR60 MB91460E Series - Microcontrollers - Fujitsu

MB91460E Series
[bit 5] S10
This bit defines resolution of A/D conversion. If this bit set "0", the resolution is 10-bit. In the other case, resolution
is 8-bit and the conversion result is stored to ADCR0 and in the lower 8 bits of the dedicated ADC result registers.
• Initialized to "0" by a reset.
[bit 4 to 0] ACH4-0 (Analog convert select channel, read-only)
These bits show the number of the currently or previously converted analog channel, depending on bit ACHMD
(see below).
ACH4 ACH3 ACH2 ACH1 ACH0 Converted channel
0 0 0 0 0 AN0
0 0 0 0 1 AN1
... ...
1 1 1 1 0 AN30
1 1 1 1 1 AN31
• Writing these bits has no effect (bit 0 is writeable with special function ADCHMD).
• Initialized to "0000" by software reset (RST).
[bit 0] ACHMD (ACH register mode, write-only)
For reading out the ACH4-0 register bits (see below), there is a direct mode and a latched mode.
In direct mode, ACH4-0 shows the number of the ADC channel which is currently in conversion, e.g. the internal
conversion channel pointer. This pointer is incremented immediately after a conversion is finished. On MB91460
series devices having the old ADC macro, ACH4-0 always show this mode.
In the new latched mode, ACH4-0 shows the number of the ADC channel whose conversion was finished
previously. After a conversion is finished, the conversion channel pointer is latched and the latched data can be
read in this mode. At the end of the next conversion, the latch is overwritten if no PAUSE condition exists.
ACHMD Function
0 Direct ACH register mode [Initial value]
1 Latched ACH register mode
• ACHMD is a write-only bit.
• Read- or read-modify-write access returns the value of bit ACH0, that’s why read-modify-write access is not
allowed.
• Initial value is 0.
36 DS705-00002-1v3-E