FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series ■ PIN DESCRIPTION 1. MB91F467EA Pin no. Pin name I/O 2 to 9 10 to 17 18 to 25 28 to 35 36 to 43 44, 45 46 to 49 50 51 54 55 56 to 59 60, 61 62 63 64 65 I/O circuit type * 1 Function P01_0 to P01_7 General-purpose input/output ports I/O A D16 to D23 Signal pins of external data bus (bit16 to bit23) P00_0 to P00_7 General-purpose input/output ports I/O A D24 to D31 Signal pins of external data bus (bit24 to bit31) P07_0 to P07_7 General-purpose input/output ports I/O A A0 to A7 Signal pins of external address bus (bit0 to bit7) P06_0 to P06_7 General-purpose input/output ports I/O A A8 to A15 Signal pins of external address bus (bit8 to bit15) P05_0 to P05_7 General-purpose input/output ports I/O A A16 to A23 Signal pins of external address bus (bit16 to bit23) P04_0, P04_1 General-purpose input/output ports I/O A A24, A25 Signal pins of external address bus (bit24, bit25) P08_0 to P08_3 General-purpose input/output ports I/O A WRX0 to WRX3 External write strobe output pins P08_4 General-purpose input/output port I/O A RDX External read strobe output pin P08_5 General-purpose input/output port I/O A BGRNTX External bus release reception output pin P08_6 General-purpose input/output port I/O A BRQ External bus release request input pin P08_7 General-purpose input/output port I/O A RDY External ready input pin P09_0 to P09_3 General-purpose input/output ports I/O A CSX0 to CSX3 Chip select output pins P09_6, P09_7 General-purpose input/output ports I/O A CSX6, CSX7 Chip select output pins P10_1 General-purpose input/output port I/O A ASX Address strobe output pin P10_2 General-purpose input/output port I/O A BAAX Burst address advance output pin P10_3 General-purpose input/output port I/O A WEX Write enable output pin P10_4 General-purpose input/output port I/O A MCLKO Clock output pin for memory (Continued) 8 DS705-00002-1v3-E
(Continued) Pin no. Pin name I/O 66 I/O circuit type *1 MB91460E Series Function P10_5 General-purpose input/output port I/O A MCLKI Clock input pin for memory 67 P10_6 MCLKE I/O A General-purpose input/output port Clock enable signal pin for memory 68 MONCLK O M Clock monitor pin 70 MD_2 I G 71 MD_1 I G Mode setting pins 72 MD_0 I G 73 INITX I H External reset input pin 74 X1A ⎯ J2 Sub clock (oscillation) output 75 X0A ⎯ J2 Sub clock (oscillation) input 76 X1 ⎯ J1 Clock (oscillation) output 77 X0 ⎯ J1 Clock (oscillation) input 83 to 86 87 88 89 90 91 92 93 P24_0 to P24_3 General-purpose input/output ports I/O A INT0 to INT3 External interrupt input pins P24_4 General-purpose input/output port INT4 I/O C External interrupt input pin SDA2 I2C bus DATA input/output pin P24_5 General-purpose input/output port INT5 I/O C External interrupt input pin SCL2 I2C bus clock input/output pin P24_6 General-purpose input/output port INT6 I/O C External interrupt input pin SDA3 I2C bus DATA input/output pin P24_7 General-purpose input/output port INT7 I/O C External interrupt input pin SCL3 I2C bus clock input/output pin P23_0 General-purpose input/output port RX0 I/O A RX input pin of CAN0 INT8 External interrupt input pin P23_1 General-purpose input/output port I/O A TX0 TX output pin of CAN0 P23_2 General-purpose input/output port RX1 I/O A RX input pin of CAN1 INT9 External interrupt input pin (Continued) DS705-00002-1v3-E 9
Page 1 and 2: FUJITSU SEMICONDUCTOR DATA SHEET 32
Page 3 and 4: MB91460E Series (Continued) • Rea
Page 5 and 6: MB91460E Series Sound Generator 1 c
Page 7: MB91460E Series DS705-00002-1v3-E 7
Page 11 and 12: (Continued) Pin no. Pin name I/O 10
Page 13 and 14: (Continued) Pin no. Pin name I/O 16
Page 15 and 16: 2. Power supply/Ground pins MB91460
Page 17 and 18: Type Circuit Remarks MB91460E Serie
Page 19 and 20: Type Circuit Remarks G Mask ROM and
Page 21 and 22: Type Circuit Remarks M CMOS level t
Page 23 and 24: (Continued) Example of using opposi
Page 25 and 26: ■ NOTES ON DEBUGGER 1. Execution
Page 27 and 28: ■ A/D CONVERTER / RANGE COMPARATO
Page 29 and 30: 3. Block Diagram of A/D Converter T
Page 31 and 32: 1. On MB91F467E, ADC1 does not exis
Page 33 and 34: • ADCS1 : Access: Half-word, Byte
Page 35 and 36: MB91460E Series [bit 9] STRT (Start
Page 37 and 38: 4.2. Common Data Register (ADCR1, A
Page 39 and 40: 4.5. A/D Channel Setting Register (
Page 41 and 42: 5.2. Range Comparator Registers The
Page 43 and 44: 5.2.3. Inverted Range Selection reg
Page 45 and 46: MB91460E Series The interrupt condi
Page 47 and 48: 6. Operation of A/D Converter MB914
Page 49 and 50: 6.5. Scan Conversion The following
Page 51 and 52: MB91460E Series The automatic inter
Page 53 and 54: ■ CLOCK SUPERVISOR (New Feature)
Page 55 and 56: 2.1. Clock Supervisor Control Regis
Page 57 and 58: 3. Block Diagram Clock Supervisor M
Page 59 and 60:
MB91460E Series Figure 0-4 Timing D
Page 61 and 62:
Page 63 and 64:
Page 65 and 66:
4.3. Re-enabling the RC-oscillator
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MB91460E Series Figure 0-11 Timing
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Timing Diagram: Waking up from Sub
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4.9. RTC mode (STOP mode with Real
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4.11. Check if reset was asserted b
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■ MB91460E Series DS705-00002-1v3
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2. Standby RAM MB91460E Series MB91
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3.3. EXTE: Shutdown recovery extern
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[bit 1] RTCF: Real Time Clock recov
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3.6. EXTLV1/2: Shutdown recovery ex
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4.1.3. Shutdown with Real Time Cloc
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4.1.8. External Interrupts: Level o
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4.3. Determining the Reset Source a
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4.5. I/O Behaviour in Shutdown Duri
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3. Programming model 3.1. Basic pro
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4.3. CCR (Condition Code Register)
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■ EMBEDDED PROGRAM/DATA MEMORY (F
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3.2. Flash access timing settings i
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4. Parallel Flash programming mode
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5. Poweron Sequence in parallel pro
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6.3. Security Vector FSV2 MB91460E
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■ MEMORY MAPS 1. MB91F467EA 00000
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Address 000000H 000004H 000008H Reg
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(Continued) Address 0000A0H Registe
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(Continued) Address 000180H Reserve
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(Continued) Address 000200H 000204H
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(Continued) Address 000348H 00034CH
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(Continued) Address 00048CH 000490H
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(Continued) Address + 0 + 1 Registe
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Address 000704H 000708H 00070CH 000
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(Continued) Address 000D80H 000D84H
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(Continued) Address 000E80H 000E84H
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(Continued) Address 002000H to 006F
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(Continued) Address 00C080H 00C084H
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(Continued) Address 00C1A0H 00C1A4H
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Address 00F09CH 00F0A0H 00F0A4H 00F
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32bit read/write dat[31:0] dat[31:0
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(Continued) Interrupt Decimal Inter
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(Continued) Interrupt Decimal Inter
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■ RECOMMENDED SETTINGS 1. PLL and
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MB91460E Series (Continued) Modulat
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MB91460E Series (Continued) Modulat
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(Continued) Modulation Degree (k) R
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“H” level average output curren
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2. Recommended operating conditions
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3. DC characteristics MB91460E Seri
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Parameter Symbol Analog inputleakag
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MB91460E Series 4. A/D converter ch
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Digital output 3FFH 3FEH 3FDH 004H
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5. Alarm comparator characteristics
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7. AC characteristics 7.1. Clock ti
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7.3. LIN-USART Timings at VDD5 = 3.
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7.4. I 2 C AC Timings at VDD5 = 3.0
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7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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