FR60 MB91460E Series - Microcontrollers - Fujitsu

4.2. Common Data Register (ADCR1, ADCR0)
MB91460E Series
These registers store the conversion results of the A/D converter. ADCR0 stores lower 8-bit. ADCR1 stores
upper 2-bit. The register values are updated at the completion of each conversion. The registers normally store
the results of the previous conversion.
• ADCR1 : Access: Word, Half-word, Byte
15 14 13 12 11 10 9 8 Bit
- - - - - - D9 D8
0 0 0 0 0 0 X X Initial value
R0, W0 R0, W0 R0, W0 R0, W0 R0, W0 R0, W0 R R Attribute
• ADCR0 : Access: Word, Half-word, Byte
7 6 5 4 3 2 1 0 Bit
D7 D6 D5 D4 D3 D2 D1 D0
X X X X X X X X Initial value
R R R R R R R R Attribute
• Bit 15 to 10 of ADCR1 are read as "0".
• The A/D converter has a conversion data protection function. See the "Operation" section for further information.
4.3. Dedicated A/D Channel Data Register (ADCD0 to ADCD31)
There are 32 ADC result data registers, one per channel. The registers are written by hardware at the end of
conversion of the attached channel. ADCD0 is attached to channel 0, ADCD31 is attached to channel 31.
• ADCD0 ... ADCD31 : Access: Word, Half-word, Byte
15 14 13 12 11 10 9 8 Bit
- - - - - - D9 D8
0 0 0 0 0 0 X X Initial value
R0 R0 R0 R0 R0 R0 R R Attribute
7 6 5 4 3 2 1 0 Bit
D7 D6 D5 D4 D3 D2 D1 D0
X X X X X X X X Initial value
R R R R R R R R Attribute
• Bit 15 to 10 of the ADCD registers are read as "0".
• The A/D converter has a conversion data protection function. In continous conversion mode, the protection
function can be changed to protect the A/D Channel Data registers rather then the A/D Data Register (ADCR1).
See section “6.6. Protection of the ADC Channel Data Registers" for further information.
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