FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series (Continued) Parameter Symbol Pin name Condition Power supply current MB91 F467EA ICC VDD5R ICCH VDD5R * 1 (VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0V,TA =−40 °C to + 105 °C) MB91F467EA: CLKB: 100 MHz CLKP: 50 MHz CLKT: 50 MHz CLKCAN: 50 MHz Value Min Typ Max ⎯ 110 140 mA Unit Remarks Code fetch from Flash TA = + 25 °C ⎯ 10 30 µA ShutDown mode with RTC running on 32 kHz Sub clock * 2 TA = + 85 °C ⎯ 80 150 µA TA = + 105 °C ⎯ 160 300 µA TA = + 25 °C ⎯ 15 35 µA ShutDown mode with RTC running on 100 kHz RC clock *3 TA = + 85 °C ⎯ 85 160 µA TA = + 105 °C ⎯ 170 320 µA TA = + 25 °C ⎯ 30 100 µA At STOP mode *4 TA = + 85 °C ⎯ 450 1000 µA TA = + 105 °C ⎯ 1000 2200 µA TA = + 25 °C ⎯ 140 300 µA RTC : 4 MHz mode *5 TA = + 85 °C ⎯ 500 1200 µA TA = + 105 °C ⎯ 1000 2400 µA TA = + 25 °C ⎯ 120 200 µA RTC : 100 kHz mode *6 TA = + 85 °C ⎯ 500 1100 µA TA = + 105 °C ⎯ 1000 2300 µA ILVE VDD5 ⎯ ⎯ 70 150 µA ILVI VDD5R ⎯ ⎯ 50 100 µA IOSC VDD5 ⎯ ⎯ 250 500 µA ⎯ ⎯ 20 40 µA External low voltage detection Internal low voltage detection Main clock (4 MHz) Sub clock (32 kHz) 1. Current on regulator supply pin VDD5R does not include IOSC and ICC of the I/O ring. 2. ShutDown mode with standby RAM enabled, sub regulator set to 1.2V, Low voltage detection disabled. Same current consumption if RTC and Sub oscillator are disabled. 3. ShutDown mode with standby RAM enabled, sub regulator set to 1.2V, Low voltage detection disabled, RC oscillator enabled 100 kHz. 4. STOP mode, sub regulator set to 1.2V, Low voltage detection disabled, RC oscillator disabled. 5. STOP mode, sub regulator set to 1.2V, Low voltage detection disabled, RC oscillator disabled, Main oscillator enabled. 6. STOP mode, sub regulator set to 1.2V, Low voltage detection disabled, RC oscillator enabled 100 kHz. 158 DS705-00002-1v3-E
MB91460E Series 4. A/D converter characteristics (VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0V,TA =−40 °C to + 105 °C) Parameter Symbol Pin name Min Value Typ Max Unit Remarks Resolution ⎯ ⎯ ⎯ ⎯ 10 bit Total error ⎯ ⎯ − 3 ⎯ + 3 LSB Nonlinearity error ⎯ ⎯ − 2.5 ⎯ + 2.5 LSB Differential nonlinearity error ⎯ ⎯ − 1.9 ⎯ + 1.9 LSB Zero reading voltage VOT ANn Full scale reading voltage VFST ANn Compare time Tcomp ⎯ Sampling time Tsamp ⎯ Conversion time Tconv ⎯ 1. Paramater is under re-evaluation. AVRL − 1.5 LSB AVRH − 3.5 LSB Note : The accuracy gets worse as AVRH - AVRL becomes smaller AVRL + 0.5 LSB AVRH − 1.5 LSB AVRL + 2.5 LSB AVRH + 0.5 LSB 0.6 ⎯ t.b.d. 1 (Continued) DS705-00002-1v3-E 159 V V µs 2.0 ⎯ t.b.d. 1 µs 0.4 ⎯ ⎯ µs 1.0 ⎯ ⎯ µs 1.0 ⎯ ⎯ µs 3.0 ⎯ ⎯ µs Input capacitance CIN ANn ⎯ ⎯ 11 pF Input resistance RIN ANn ⎯ ⎯ 2.6 kΩ ⎯ ⎯ 12.1 kΩ 4.5 V ≤ AVCC5 ≤ 5.5 V 3.0 V ≤ AVCC5 ≤ 4.5 V 4.5 V ≤ AVCC5 ≤ 5.5 V, REXT < 2 kΩ 3.0 V ≤ AVCC5 ≤ 4.5 V, REXT < 1 kΩ 4.5 V ≤ AVCC5 ≤ 5.5 V 3.0 V ≤ AVCC5 ≤ 4.5 V 4.5 V ≤ AVCC5 ≤ 5.5 V 3.0 V ≤ AVCC5 ≤ 4.5 V Analog input leakage current IAIN ANn − 1 − 3 ⎯ ⎯ + 1 + 3 µA µA TA = + 25 °C TA = + 105 °C Analog input voltage range VAIN ANn AVRL ⎯ AVRH V Offset between input channels ⎯ ANn ⎯ ⎯ 4 LSB
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FUJITSU SEMICONDUCTOR DATA SHEET 32
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MB91460E Series (Continued) • Rea
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MB91460E Series Sound Generator 1 c
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MB91460E Series DS705-00002-1v3-E 7
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(Continued) Pin no. Pin name I/O 66
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Page 13 and 14:
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2. Power supply/Ground pins MB91460
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Type Circuit Remarks MB91460E Serie
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Type Circuit Remarks G Mask ROM and
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Type Circuit Remarks M CMOS level t
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(Continued) Example of using opposi
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■ NOTES ON DEBUGGER 1. Execution
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■ A/D CONVERTER / RANGE COMPARATO
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3. Block Diagram of A/D Converter T
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1. On MB91F467E, ADC1 does not exis
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• ADCS1 : Access: Half-word, Byte
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MB91460E Series [bit 9] STRT (Start
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4.2. Common Data Register (ADCR1, A
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4.5. A/D Channel Setting Register (
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5.2. Range Comparator Registers The
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5.2.3. Inverted Range Selection reg
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MB91460E Series The interrupt condi
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6. Operation of A/D Converter MB914
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6.5. Scan Conversion The following
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MB91460E Series The automatic inter
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■ CLOCK SUPERVISOR (New Feature)
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2.1. Clock Supervisor Control Regis
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3. Block Diagram Clock Supervisor M
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MB91460E Series Figure 0-4 Timing D
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4.3. Re-enabling the RC-oscillator
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MB91460E Series Figure 0-11 Timing
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Timing Diagram: Waking up from Sub
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4.9. RTC mode (STOP mode with Real
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4.11. Check if reset was asserted b
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■ MB91460E Series DS705-00002-1v3
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2. Standby RAM MB91460E Series MB91
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3.3. EXTE: Shutdown recovery extern
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[bit 1] RTCF: Real Time Clock recov
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3.6. EXTLV1/2: Shutdown recovery ex
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4.1.3. Shutdown with Real Time Cloc
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4.1.8. External Interrupts: Level o
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4.3. Determining the Reset Source a
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4.5. I/O Behaviour in Shutdown Duri
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3. Programming model 3.1. Basic pro
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4.3. CCR (Condition Code Register)
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■ EMBEDDED PROGRAM/DATA MEMORY (F
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3.2. Flash access timing settings i
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4. Parallel Flash programming mode
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5. Poweron Sequence in parallel pro
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6.3. Security Vector FSV2 MB91460E
Page 107 and 108: ■ MEMORY MAPS 1. MB91F467EA 00000
Page 109 and 110: Address 000000H 000004H 000008H Reg
Page 111 and 112: (Continued) Address 0000A0H Registe
Page 113 and 114: (Continued) Address 000180H Reserve
Page 115 and 116: (Continued) Address 000200H 000204H
Page 117 and 118: (Continued) Address 000348H 00034CH
Page 119 and 120: (Continued) Address 00048CH 000490H
Page 121 and 122: (Continued) Address + 0 + 1 Registe
Page 123 and 124: Address 000704H 000708H 00070CH 000
Page 125 and 126: (Continued) Address 000D80H 000D84H
Page 127 and 128: (Continued) Address 000E80H 000E84H
Page 129 and 130: (Continued) Address 002000H to 006F
Page 131 and 132: (Continued) Address 00C080H 00C084H
Page 133 and 134: (Continued) Address 00C1A0H 00C1A4H
Page 135 and 136: Address 00F09CH 00F0A0H 00F0A4H 00F
Page 137 and 138: 32bit read/write dat[31:0] dat[31:0
Page 139 and 140: (Continued) Interrupt Decimal Inter
Page 141 and 142: (Continued) Interrupt Decimal Inter
Page 143 and 144: ■ RECOMMENDED SETTINGS 1. PLL and
Page 145 and 146: MB91460E Series (Continued) Modulat
Page 147 and 148: MB91460E Series (Continued) Modulat
Page 149 and 150: (Continued) Modulation Degree (k) R
Page 151 and 152: “H” level average output curren
Page 153 and 154: 2. Recommended operating conditions
Page 155 and 156: 3. DC characteristics MB91460E Seri
Page 157: Parameter Symbol Analog inputleakag
Page 161 and 162: Digital output 3FFH 3FEH 3FDH 004H
Page 163 and 164: 5. Alarm comparator characteristics
Page 165 and 166: 7. AC characteristics 7.1. Clock ti
Page 167 and 168: 7.3. LIN-USART Timings at VDD5 = 3.
Page 169 and 170: 7.4. I 2 C AC Timings at VDD5 = 3.0
Page 171 and 172: 7.5. Free-run timer clock Input pul
Page 173 and 174: MCLKO CSXn delayed CSXn ASX ADDRESS
Page 175 and 176: MCLKO MCLKI CSXn WRXn (as byte enab
Page 177 and 178: MB91460E Series 7.7.4. Synchronous
Page 179 and 180: MB91460E Series 7.7.6. Asynchronous
Page 181 and 182: 7.7.8. RDY waitcycle insertion Para
Page 183 and 184: 7.7.10. Clock relationships MB91460
Page 185 and 186: MCLKO DACKX DEOP delayed DACKX dela
Page 187 and 188: MCLKO CSXn delayed CSXn ASX ADDRESS
Page 189 and 190: MCLKO MCLKI CSXn WRXn (as byte enab
Page 191 and 192: MB91460E Series 7.8.4. Synchronous
Page 193 and 194: MB91460E Series 7.8.6. Asynchronous
Page 195 and 196: 7.8.8. RDY waitcycle insertion Para
Page 197 and 198: 7.8.10. Clock relationships MCLKO
Page 199 and 200: MCLKO DACKX DEOP delayed DACKX dela
Page 201 and 202: ■ PACKAGE DIMENSION 208-pin plast
Page 203 and 204: Version/ Date Ver. 0.8 2009-10-19 V
Page 205 and 206: ■ CHANGES IN THIS EDITION DS705-0
Page 207 and 208: MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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