FR60 MB91460E Series - Microcontrollers - Fujitsu

MB91460E Series
5.2.4. Range Comparator Result Flags
The result of range comparision is stored in 2 flag registers:
• RCOINT[0:31]: Range comparision interrupt flags
• RCOOF[0:31]: Range comparision overflow flags
The Range Comparator Result flags are organized “per ADC channel”. There are 32 Range Comparator overflow
flags and 32 interrupt flags. In case of a RCO interrupt, all interrupt flags can be read out by one 32-bit read
operation and analyzed using the Bit Search Unit. The Bit Search Unit will return the number of the interrupting
channel. Since bit search works from MSB to LSB (from left to right), ADC channel 0 is located on the MSB of
the registers and ADC channel 31 is on LSB.
• RCOINT[0:31] : Access: Word, Half-word, Byte
31 30 29 28 27 26 259 24 Bit
RCOINT0 RCOINT1 RCOINT2 RCOINT3 RCOINT4 RCOINT5 RCOINT6 RCOINT7
0 0 0 0 0 0 0 0 Initial value
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 Attribute
23 22 21 20 19 18 17 16 Bit
RCOINT8 RCOINT9 RCOINT10 RCOINT11 RCOINT12 RCOINT13 RCOINT14 RCOINT15
0 0 0 0 0 0 0 0 Initial value
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 Attribute
15 14 13 12 11 10 9 8 Bit
RCOINT16 RCOINT17 RCOINT18 RCOINT19 RCOINT20 RCOINT21 RCOINT22 RCOINT23
0 0 0 0 0 0 0 0 Initial value
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 Attribute
7 6 5 4 3 2 1 0 Bit
RCOINT24 RCOINT25 RCOINT26 RCOINT27 RCOINT28 RCOINT29 RCOINT30 RCOINT31
0 0 0 0 0 0 0 0 Initial value
R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 R/W0 Attribute
Note that bit[31] is assigned to ADC channel 0, bit[30] is assigned to ADC channel one and so on.
[bits 31:0] RCOINT[0:31] (Range Comparator Interrupt flags)
The RCOINT flags show that a “out of range” or “inside range” condition has been found on the ADC channel.
The bits are set under the following condition:
• the ADC channel is enabled ADER.ADE[i] is set and
• the range comparision for this channel is enabledADCCn.RCOE[i] is setand
• the conversion of the ADC channel is just finished and
• an interrupt condition was found (see the table on next page).
• The bits are cleared by writing 0 or by software reset (RST). Writing 1 has no effect.
• Read-modify-write operations read 1.
44 DS705-00002-1v3-E