FR60 MB91460E Series - Microcontrollers - Fujitsu

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MB91460E Series (Continued) Address 0002F4H 0002F8H 0002FCH 000300H Reserved 000304H 000308H, 00030CH 000310H 000314H 000318H Register + 0 + 1 + 2 + 3 TCDT5 [R/W] XXXXXXXX XXXXXXXX TCDT6 [R/W] XXXXXXXX XXXXXXXX TCDT7 [R/W] XXXXXXXX XXXXXXXX UDCCH0 [R/W] 00000000 UDRC3 [W] 00000000 UDCCH2 [R/W] 00000000 UDCCH3 [R/W] 00000000 UDRC0 [W] 00000000 UDCCL0 [R/W] 00001000 UDRC2 [W] 00000000 UDCCL2 [R/W] 00001000 UDCCL3 [R/W] 00001000 Reserved Reserved Reserved Reserved Reserved TCCS5 [R/W] 00000000 TCCS6 [R/W] 00000000 TCCS7 [R/W] 00000000 UDCR0 [R] 00000000 UDCS0 [R/W] 00000000 Block Free Running Timer 5 (ICU 6, ICU 7) Free Running Timer 6 Free Running Timer 7 Up/Down Counter 0 Reserved Reserved UDCR3 [R] 00000000 Reserved Reserved UDCR2 [R] 00000000 UDCS2 [R/W] 00000000 UDCS3 [R/W] 00000000 Up/Down Counter 2 to 3 00031CH Reserved Reserved 000320H 000324H to 00032CH 000330H 000334H 000338H 00033CH 000340H 000344H GCN13 [R/W] 00110010 00010000 PTMR12 [R] 11111111 11111111 PDUT12 [R/W] XXXXXXXX XXXXXXXX PTMR13 [R] 11111111 11111111 PDUT13 [R/W] XXXXXXXX XXXXXXXX PTMR14 [R] 11111111 11111111 PDUT14 [R/W] XXXXXXXX XXXXXXXX Reserved GCN23 [R/W] - - - - 0000 PPG Control 12 to 15 Reserved Reserved PCSR12 [R/W] XXXXXXXX XXXXXXXX PCNH12 [R/W] 0000000 - PCNL12 [R/W] 000000 - 0 PCSR13 [R/W] XXXXXXXX XXXXXXXX PCNH13 [R/W] 0000000 - PCNL13 [R/W] 000000 - 0 PCSR14 [R/W] XXXXXXXX XXXXXXXX PCNH14 [R/W] 0000000 - PCNL14 [R/W] 000000 - 0 PPG 12 PPG 13 PPG 14 (Continued) 116 DS705-00002-1v3-E
(Continued) Address 000348H 00034CH 000350H to 000364H 000368H 00036CH Register + 0 + 1 + 2 + 3 PTMR15 [R] 11111111 11111111 PDUT15 [R/W] XXXXXXXX XXXXXXXX IBCR2 [R/W] 00000000 ITMKH2 [R/W] 00 - - - - 11 000370H Reserved 000374H 000378H IBCR3 [R/W] 00000000 ITMKH3 [R/W] 00 - - - - 11 00037CH Reserved 000380H to 00038CH 000390H 000394H to 0003ECH 0003F0H 0003F4H 0003F8H 0003FCH 000400H to 00043CH IBSR2 [R] 00000000 ITMKL2 [R/W] 11111111 IDAR2 [R/W] 00000000 IBSR3 [R] 00000000 ITMKL3 [R/W] 11111111 IDAR3 [R/W] 00000000 ROMS [R] 11111111 00000000 (MB91F467EA) PCSR15 [R/W] XXXXXXXX XXXXXXXX PCNH15 [R/W] 0000000 - MB91460E Series PCNL15 [R/W] 000000 - 0 Block PPG 15 Reserved Reserved ITBAH2 [R/W] - - - - - - 00 ISMK2 [R/W] 01111111 ICCR2 [R/W] 00011111 ITBAH3 [R/W] - - - - - - 00 ISMK3 [R/W] 01111111 ICCR3 [R/W] 00011111 ITBAL2 [R/W] 00000000 ISBA2 [R/W] - 0000000 Reserved ITBAL3 [R/W] 00000000 ISBA3 [R/W] - 0000000 Reserved (Continued) DS705-00002-1v3-E 117 I 2 C 2 I 2 C 3 Reserved Reserved Reserved ROM Select Register Reserved Reserved BSD0 [W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX BSD1 [R/W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX BSDC [W] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX BSRR [R] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Bit Search Module Reserved Reserved
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FUJITSU SEMICONDUCTOR DATA SHEET 32
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MB91460E Series (Continued) • Rea
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MB91460E Series Sound Generator 1 c
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MB91460E Series DS705-00002-1v3-E 7
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(Continued) Pin no. Pin name I/O 66
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Page 13 and 14:
Page 15 and 16:
2. Power supply/Ground pins MB91460
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Type Circuit Remarks MB91460E Serie
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Type Circuit Remarks G Mask ROM and
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Type Circuit Remarks M CMOS level t
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(Continued) Example of using opposi
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■ NOTES ON DEBUGGER 1. Execution
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■ A/D CONVERTER / RANGE COMPARATO
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3. Block Diagram of A/D Converter T
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1. On MB91F467E, ADC1 does not exis
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• ADCS1 : Access: Half-word, Byte
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MB91460E Series [bit 9] STRT (Start
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4.2. Common Data Register (ADCR1, A
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4.5. A/D Channel Setting Register (
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5.2. Range Comparator Registers The
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5.2.3. Inverted Range Selection reg
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MB91460E Series The interrupt condi
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6. Operation of A/D Converter MB914
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6.5. Scan Conversion The following
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MB91460E Series The automatic inter
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■ CLOCK SUPERVISOR (New Feature)
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2.1. Clock Supervisor Control Regis
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3. Block Diagram Clock Supervisor M
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MB91460E Series Figure 0-4 Timing D
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Page 63 and 64:
Page 65 and 66: 4.3. Re-enabling the RC-oscillator
Page 67 and 68: MB91460E Series Figure 0-11 Timing
Page 69 and 70: Timing Diagram: Waking up from Sub
Page 71 and 72: 4.9. RTC mode (STOP mode with Real
Page 73 and 74: 4.11. Check if reset was asserted b
Page 75 and 76: ■ MB91460E Series DS705-00002-1v3
Page 77 and 78: 2. Standby RAM MB91460E Series MB91
Page 79 and 80: 3.3. EXTE: Shutdown recovery extern
Page 81 and 82: [bit 1] RTCF: Real Time Clock recov
Page 83 and 84: 3.6. EXTLV1/2: Shutdown recovery ex
Page 85 and 86: 4.1.3. Shutdown with Real Time Cloc
Page 87 and 88: 4.1.8. External Interrupts: Level o
Page 89 and 90: 4.3. Determining the Reset Source a
Page 91 and 92: 4.5. I/O Behaviour in Shutdown Duri
Page 93 and 94: 3. Programming model 3.1. Basic pro
Page 95 and 96: 4.3. CCR (Condition Code Register)
Page 97 and 98: ■ EMBEDDED PROGRAM/DATA MEMORY (F
Page 99 and 100: 3.2. Flash access timing settings i
Page 101 and 102: 4. Parallel Flash programming mode
Page 103 and 104: 5. Poweron Sequence in parallel pro
Page 105 and 106: 6.3. Security Vector FSV2 MB91460E
Page 107 and 108: ■ MEMORY MAPS 1. MB91F467EA 00000
Page 109 and 110: Address 000000H 000004H 000008H Reg
Page 111 and 112: (Continued) Address 0000A0H Registe
Page 113 and 114: (Continued) Address 000180H Reserve
Page 115: (Continued) Address 000200H 000204H
Page 119 and 120: (Continued) Address 00048CH 000490H
Page 121 and 122: (Continued) Address + 0 + 1 Registe
Page 123 and 124: Address 000704H 000708H 00070CH 000
Page 125 and 126: (Continued) Address 000D80H 000D84H
Page 127 and 128: (Continued) Address 000E80H 000E84H
Page 129 and 130: (Continued) Address 002000H to 006F
Page 131 and 132: (Continued) Address 00C080H 00C084H
Page 133 and 134: (Continued) Address 00C1A0H 00C1A4H
Page 135 and 136: Address 00F09CH 00F0A0H 00F0A4H 00F
Page 137 and 138: 32bit read/write dat[31:0] dat[31:0
Page 139 and 140: (Continued) Interrupt Decimal Inter
Page 141 and 142: (Continued) Interrupt Decimal Inter
Page 143 and 144: ■ RECOMMENDED SETTINGS 1. PLL and
Page 145 and 146: MB91460E Series (Continued) Modulat
Page 147 and 148: MB91460E Series (Continued) Modulat
Page 149 and 150: (Continued) Modulation Degree (k) R
Page 151 and 152: “H” level average output curren
Page 153 and 154: 2. Recommended operating conditions
Page 155 and 156: 3. DC characteristics MB91460E Seri
Page 157 and 158: Parameter Symbol Analog inputleakag
Page 159 and 160: MB91460E Series 4. A/D converter ch
Page 161 and 162: Digital output 3FFH 3FEH 3FDH 004H
Page 163 and 164: 5. Alarm comparator characteristics
Page 165 and 166: 7. AC characteristics 7.1. Clock ti
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7.3. LIN-USART Timings at VDD5 = 3.
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7.4. I 2 C AC Timings at VDD5 = 3.0
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7.5. Free-run timer clock Input pul
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.7.4. Synchronous
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MB91460E Series 7.7.6. Asynchronous
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7.7.8. RDY waitcycle insertion Para
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7.7.10. Clock relationships MB91460
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MCLKO DACKX DEOP delayed DACKX dela
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MCLKO CSXn delayed CSXn ASX ADDRESS
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MCLKO MCLKI CSXn WRXn (as byte enab
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MB91460E Series 7.8.4. Synchronous
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MB91460E Series 7.8.6. Asynchronous
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7.8.8. RDY waitcycle insertion Para
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7.8.10. Clock relationships MCLKO
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MCLKO DACKX DEOP delayed DACKX dela
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■ PACKAGE DIMENSION 208-pin plast
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Version/ Date Ver. 0.8 2009-10-19 V
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■ CHANGES IN THIS EDITION DS705-0
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MEMO MB91460E Series DS705-00002-1v
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MB91460E Series DS705-00002-1v3-E 2
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FR60 MB91460E Series - Microcontrollers - Fujitsu

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