Edwin Jan Klein - Universiteit Twente

Chapter 5
wafer is used (step 1). The SiO2, with a thickness of 6-8 µm, serves as a buffer layer
between the waveguides and the silicon substrate to prevent leakage of light into the
substrate. On top of the SiO2 a 140-145 nm thick (varies slightly per application) layer
of Si3N4 is deposited (step 2) using low-pressure chemical vapor deposition (LPCVD)
at 800 °C. In this layer the waveguides are defined by first spinning a 1.5 µm thick
layer of photoresist on top of the Si3N4 (step 3). After a pre-exposure bake of 1 minute
at 95 °C this layer is exposed to UV light for 5.5 seconds through a chrome mask on a
KARL SUSS MA 56M mask aligner (step 4). This mask, of which a small portion is
shown in Figure 5.2 contains the definition of the waveguides, ring resonators, test
structures and several supporting structures such as dice lines.
Figure 5.2. Small section of a mask that is used to define laterally coupled resonators. The
layout shows reflectors (left), normal micro-resonators (right), waveguide test structures (loop
and several straight waveguides) and dice lines (vertical)
After exposure the resist is baked at 120 °C for two minutes after which the resist is
developed. The developed resist is then baked at 120 °C for 5 minutes to increase its
resistance to dry plasma etching (step 5). Next the waveguides are created by
completely etching through the Si3N4 in the areas not protected by resist using
reactive ion etching (RIE) with a mixture of CHF3/O2 (step 6). After etching the resist
is removed using fuming nitric acid (100% HNO3) (step 7). A 1 µm thick layer of
tetra-ethyl-ortho-silicate (TEOS SiO2) is then deposited (step 8) at 700 °C. To densify
the TEOS silicon oxide and anneal out loss-inducing NH and OH groups the wafer is
annealed at 1100 °C for three hours (step 9). On top of the TEOS SiO2 an additional
top cladding of 3 µm SiO2 is deposited (step 11) using plasma enhanced chemical
vapor deposition (PECVD) after which the wafer is annealed for the second time at
1100 °C for three hours (step 11). As a final step the wafer with the completed
devices is diced using a high precision dicing saw with a blade thickness of 50 µm.
In Figure 5.3 microscope images of a realized racetrack resonator and a racetrack
based reflector are shown. The width of these devices is 220 µm. The inset in the
image on the left shows a close-up of the coupling region of the racetrack resonator.
The gap between the port waveguide and the resonator in the coupling region
measures only 800 nm which is the minimum gap width which can be opened reliably
using the fabrication process described above.
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