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shown in Figure 6-2. Most instructions specify data movement on the XDB, YDB, and dataALU operations in the same operation word. The DSP56K performs each <strong>of</strong> these operationsin parallel.~ 87 0I OPCODEDATA BUS MOVEMENT IxlxlxlxlxlxlxlxOPTIONAL EFFECTIVE ADDRESS EXTENSIONFigure 6-2 General Format <strong>of</strong> an Instruction Operation WordThe data bus movement field provides the operand reference type. It selects the type <strong>of</strong>memory or register reference to be made, the direction <strong>of</strong> transfer, and the effectiveaddress(es) for data movement on the XDB and YDB. This field may require additionalinformation to fully specify the operand for certain addressing modes. An effectiveaddress extension word following the operation word provides an immediate data addressor an absolute address if required (see Section 6.3.5.3 for the description <strong>of</strong> specialaddressing modes). Examples <strong>of</strong> operations that may include the extension word includethe move operations X:, X:R, V:, R:Y, and L:. Additional information is presented inAPPENDIX A - INSTRUCTION SET DETAILS.The opcode field <strong>of</strong> the operation word specifies the data ALU operation or the programcontrol unit operation to be performed, and any additional operands required by theinstruction. Only those data ALU and program control unit operations that can accompanydata bus movement will be specified in the opcode field <strong>of</strong> the instruction. Other data ALU,program control unit, and all address ALU operations will be specified in an instructionword with a different format. These formats include operation words which contain shortimmediate data or short absolute addresses (see Section 6.3.5.3 for the description <strong>of</strong>special addressing modes).6.3.1 Operand SizesOperand sizes are defined as follows: a byte is 8 bits long, a short word is16 bits long, aword is 24 bits long, a long word is 48 bits long, and an accumulator is 56 bits long (seeFigure 6-3). The operand size for each instruction is either explicitly encoded in theinstruction or implicitly defined by the instruction operation. Implicit instructions supportsome subset <strong>of</strong> the five sizes shown in Figure 6-3.

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