section 7 - Index of

OSCKPAB XAB YABOSO OSI~-- MEMORY BUS SELECTLOWEROR~ __ ~~ ____ ~ EQUALBC3-BCOL..-___ --,.--___ ---' HIGHEROR~r--------~--------~ EQUALLOWER LIMIT REGISTERBREAKPOINTOCCURREDBREAKPOINT COUNTERCOUNT=O-Figure 10-6 OnCE Memory Breakpoint LogicISBKPT10.4.2 Memory Upper Limit Register (OMULR)The 16-bit Memory Upper Limit Register stores the memory breakpoint upper limit. TheOMULR can be read or written through the OnCE serial interface. Before enabling breakpoints,OMULR must be loaded by the external command controller.10.4.3 Memory Lower Limit Register (OMLLR)The 16-bit Memory Lower Limit Register stores the m~mory breakpoint lower limit. TheOMLLR can be read or written through the OnCE serial interface. Before enabling breakpoints,OMLLR must be loaded by the external command controller.