section 7 - Index of

Table 4-1 Address Register Indirect SummaryAddress Register IndirectUsesMnModifierOperand ReferenceS C D A P X V LXVAssemblerSyntaxNo UpdateNoX X XXX(Rn)Postincrement by 1YesX X XXX(Rn)+Postdecrement by 1YesX X XXX(Rn)-Postincrement by Offset NnYesX X XXX(Rn)+NnPostdecrement by Offset NnYesX X XX(Rn)-NnIndexed by Offset NnYesX X XX(Rn+Nn)Predecrement by 1YesX X XX-(Rn)NOTE:S = System Stack ReferenceC = Program Control Unit Register ReferenceD = Data ALU Register ReferenceA = Address ALU Register ReferenceP = Program Memory ReferenceX = X Memory Referencey = Y Memory ReferenceL = L Memory ReferenceXV = XV Memory Reference4.3.3 Modifier Register Flies (MO - M3 and M4 - M7)The eight 16-bit modifier registers, MO - M7, define the type of address arithmetic to beperformed for addressing mode calculations, or they can be used for general-purposestorage. The address ALU supports linear, modulo, and reverse.:carry arithmetic types forall address register indirect addressing modes. For modulo arithmetic, the contents of Mnalso specify the modulus. Each address register, Rn, has its own modifier register, Mn,associated with it. Each modifier register is set to $FFFF on processor reset, which specifieslinear arithmetic as the default type for address register update calculations.4.4 ADDRESSINGThe DSP56K provides three different addressing modes: register direct, address registerindirect, and special. Since the register direct and special addressing modes do not necessarilyuse the AGU registers, they are described in SECTION 6 - INSTRUCTION SETINTRODUCTION. The address register indirect addressing modes use the registers inthe AGU and are described in the following paragraphs.