section 7 - Index of

ADDR Shift Right and Add Accumulators ADDROperation:S+D / 2--tD (parallel move)Assembler Syntax:ADDR S,D (parallel move)Description: Add the source operand S to one-half the destination operand D and storethe result in the destination accumulator. The destination operand D is arithmeticallyshifted one bit to the right while the MS bit of D is held constant prior to the addition operation.In contrast to the ADDL instruction, the carry bit is always set correctly, and theoverflow bit can only be set by the addition operation and not by an overflow due to theinitial shifting operation. This instruction is useful for efficient divide and decimation intime (DIT) FFT algorithms.Example:ADDR 8,A XO,X:(R1)+N1 YO,Y:(R4)-;B+A / 2--tA, save XO and YOBefore ExecutionA '~___$8_0:_00_00_0_0:2_4_68_AC __ ~After ExecutionA ,'----_$_C_0:0_13_57_0_:12_3_45_6_--'B '~ __ $_0_0:0_1_35_70_:0_00_0_00 __ ~B ,$00:013570:000000'-------------~Explanation of Example: Prior to execution, the 56-bit A accumulator contains thevalue $80:000000:2468AC, and the 56-bit 8 accumulator contains the value$00:013570:000000. The ADDR B,A instruction adds one-half the value in the A accumulatorto the value in the B accumulator and stores the 56-bit result in the A accumulator.-