section 7 - Index of

NEG Negate Accumulator NEGOperation:Assembler Syntax:0-0 ~ 0 (parallel move) NEG D (parallel move)Description: Negate the destination operand D and store the result in the destinationaccumulator. This is a 56-bit, twos-complement operation.Example:NEG B X1 ,X:(R3)+ Y:(R6)-,A;O-B ~ B, update A,X1 ,R3,R6Before ExecutionBI~ __ $_0_0:_12_34_56_:7_89_A_BC __ ~BI~ __After Execution$F_F_:E_DC_B_A9_:8_76_54_4 __ ~Explanation of Example: Prior to execution, the 56-bit B accumulator contains thevalue $00:123456:789ABC. The NEG B instruction takes the twos complement of thevalue in the B accumulator and stores the 56-bit result back in the B accumulator.Condition Codes:15 14 13 12 11 10 9 8 7 6 5 4 3 2 0I LF I DM I T I *. I 81 I 80 I 11 I 10 I s I LIE I u I N I z v I c IS -L -E -U -N -Z -V -.... MR •. ~ CCR •.Computed according to the definition in A.5 CONDITION CODE COMPUTATIONSet if limiting (parallel move) or overflow has occurred in resultSet if the signed integer portion of A or B result is in useSet if A or B result is unnormalizedSet if bit 55 of A or B result is setSet if A or B result equals zeroSet if overflow has occurred in A or B resultNote: The definitions of the E and U bits vary according to the scaling mode being used.Refer to Section A.5 CONDITION CODE COMPUTATION for complete details.