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L: Long Memory Data Move L:Operation:Assembler Syntax:( ..... ); X:ea .-. 01; Y:ea .-. 02 ( ..... ) L:ea,O( ..... ); X:aa .-. 01; Y:aa .-. 02 ( ..... ) L:aa,O( ..... ); S1 .-. X:ea; S2.-. Y:ea ( ..... ) S,L:ea( ..... ); S1 .-. X:aa; S2 .-. Y:aa ( ..... ) S,L:aawhere ( ..... ) refers to any arithmetic or logical instruction which allows parallel moves.Description: Move one 48-bit long-word operand from/to X and Y memory. Two dataALU registers are concatenated to form the 48-bit long-word operand. This allows efficientmoving <strong>of</strong> both double-precision (high:low) and complex (real:imaginary) data from/to one effective address in L (X:Y) memory. The same effective address is used for boththe X and Y memory spaces; thus, only one effective address is required. Note that theA, B, A 10, and B1 ° operands reference a single 48-bit signed (double-precision) quantitywhile the X, Y, AB, and BA operands reference two separate (i.e., real and imaginary)24-bit signed quantities. All memory alterable addressing modes may be used. Absoluteshort addressing may also be used.If the arithmetic or logical opcode-operand portion <strong>of</strong> the instruction specifies a givendestination accumulator, that same accumulator or portion <strong>of</strong> that accumulator may notbe specified as a destination 0 in the parallel data bus move operation. Thus, if theopcode-operand portion <strong>of</strong> the instruction specifies the 56-bit A accumulator as its destination,the parallel data bus move portion <strong>of</strong> the instruction may not specify A, A 10, AB,or BA as destination O. Similarly, if the opcode-operand. portion <strong>of</strong> the instruction specifiesthe 56-bit B accumulator as its destination, the parallel data bus move portion <strong>of</strong> theinstruction may not specify B, B1 0, AB, or BA as its destination D. That is, duplicate destinationsare NOT allowed within the same instruction.If the opcode-operand portion <strong>of</strong> the instruction specifies a given source or destinationregister, that same register or portion <strong>of</strong> that register may be used as a source S in theparallel data bus move operation. This allows data to be moved in the same instruction inwhich it is being used as a source operand by a data ALU operation. That is, duplicatesources are allowed within the same instruction.Note: The operands A10, B10, X, Y, AB, and BA may be used only for a 48-bit longmemory move as previously described. These operands may not be used in any othertype <strong>of</strong> instruction or parallel move.

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