section 7 - Index of

6.4.2 LogicallnstructlonsThe logical instructions execute in one instruction cycle and perform all of the logical operationswithin the data ALU (except ANDI and ORI). They may affect all of the CCR bitsand, like the arithmetic instructions, are register based.Logical instructions are the only instructions that allow apparent duplicate destinations,such as:AND XO,AX:(RO):AOA logical instruction uses only the MSP portion of the A and B registers (A 1 and B 1).Therefore, the instruction actually ignores what appears to be a duplicate destination andlogically ANDs the value in the XO register with the bits in the A1 portion (bits 47-24) of theA accumulator. The parallel move shown above can simultaneously write to either of theother two portions of the A or the B accumulator without conflict. Avoid confusion byexplicitly stating A1 or B1 in the original instruction.Optional data transfers may be specified with most logical instructions, allowing paralleldata movement over the XDB and YDB or over the GOB during a data ALU operation. Thisparallel movement allows new data to be prefetched for use in subsequent instructionsand allows results calculated in previous instructions to be stored. The following listincludes the logical instructions:-ANDAND(EORLSLLSRNOTOROR(ROLRORLogical ANDAND Immediate to Control RegisterLogical Exclusive ORLogical Shift LeftLogical Shift RightLogical ComplementLogical Inclusive OROR Immediate to Control RegisterRotate LeftRotate Right*These instructions do not allow parallel data moves.