section 7 - Index of

7.3.3 Interrupt SourcesInterrupts can originate from any of the vector addresses listed in Table 7-6, whichshows the corresponding interrupt starting address for each interrupt source. Theseaddresses are located in the first 64 locations of program memory.Table 7-6 Interrupt Sources-InterruptStarting AddressIPL$0000 3 Hardware RESET$0002 3 Stack Error$0004 3 Trace$0006 3 SWI$0008 0-2 IROA$OOOA 0-2 IROBInterrupt Source: : Vectors available for peripherals$001E 3 NMI: : Vectors available for peripherals$003E 3 Illegal InstructionWhen an interrupt occurs, the instruction at the interrupt starting address is fetched first.Because the program flow is directed to a different starting address for each interrupt,the interrupt structure of the DSP56K can be described as "vectored". A vectored interruptstructure has low execution overhead. If it is known beforehand that certain interruptswill not be used, those interrupt vector locations can be used for program or datastorage.7.3.3.1 Hardware Interrupt SourcesThere are two types of hardware interrupts in the DSP56K: internal and external. Theinternal interrupt sources include all of the on-chip peripheral devices. For further informationon a device's internal interrupt sources, see the device's individual User's Manual.The external hardware interrupt sources are the RESET, NMI, IROA, and IROB pins onthe program interrupt controller in the Program Control Unit.The level sensitive RESET interrupt is the highest priority interrupt with an IPL of 3. IROAand IROB can be programmed to one of three priority levels: 0, 1, or 2 - all of which aremaskable. IROA and IROB have independent enable control and can be programmed tobe level sensitive or edge sensitive. Since level-sensitive interrupts will not be cleared