UM10211 - Standard ICs

UM10211
Chapter 2: LPC2300 memory addressing
Rev. 01 — 27 March 2007
User manual
1. Memory map and peripheral addressing
2. Memory maps
ARM processors have a single 4 GB address space. The following table shows how this
space is used on NXP embedded ARM devices.
Table 3. LPC2300 memory usage
Address range General use Address range details and description
0x0000 0000 to
0x3FFF FFFF
0x4000 0000 to
0x7FFF FFFF
0x8000 0000 to
0xDFFF FFFF
0xE000 0000 to
0xEFFF FFFF
0xF000 0000 to
0xFFFF FFFF
On-Chip
NV Memory
and fast I/O
0x0000 0000 - 0x0007 FFFF
0x3FFF C000 - 0x3FFF FFFF
Flash Memory (up to 512 kB)
Fast GPIO registers
On-Chip RAM 0x4000 0000 - 0x4000 7FFF RAM (up to 32 kB)
0x7FD0 0000 - 0x7FD0 1FFF USB RAM (8 kB)
0x7FE0 0000 - 0x7FE0 3FFF Ethernet RAM (16 kB)
Off-Chip Memory Two static memory banks, 64 KB each:
0x8000 0000 - 0x8000 FFFF Static memory bank 0, 64 KB
0x8100 0000 - 0x8100 FFFF Static memory bank 1, 64 KB
APB Peripherals 0xE000 0000 - 0xE008 FFFF 36 peripheral blocks, 16 kB each (some unused).
0xE01F C000 - 0xE01F FFFF System Control Block
AHB Peripherals 0xFFE0 0000 - 0xFFE0 3FFF Ethernet Controller
0xFFE0 4000 - 0xFFE0 7FFF General Purpose DMA Controller
0xFFE0 8000 - 0xFFE0 BFFF External Memory Controller (EMC)
0xFFE0 C000 - 0xFFE0 FFFF USB Controller
0xFFFF F000 - 0xFFFF FFFF Vectored Interrupt Controller (VIC)
The LPC2300 incorporates several distinct memory regions, shown in the following
figures. Figure 2–3 shows the overall map of the entire address space from the user
program viewpoint following reset. The interrupt vector area supports address remapping,
which is described later in this section.
UM10211_1
© NXP B.V. 2007. All rights reserved.
User manual Rev. 01 — 27 March 2007 10 of 613