UM10211 - Standard ICs

NXP Semiconductors
UM10211
Chapter 28: LPC2300 GPDMA
8.10 Software Single Request Register (DMACSoftSReq - 0xFFE0 4024)
The DMACSoftSReq Register is read/write and enables DMA single requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Writing 0 to this register has no effect. Reading the register indicates which
sources are requesting single DMA transfers. A request can be generated from either a
peripheral or the software request register. Table 28–524 shows the bit assignments of the
DMACSoftSReq Register.
Table 524. Software Single Request register (DMACSoftSReq - address 0xFFE0 4024) bit
description
Bit Symbol Description Reset
Value
0 SoftReqSSP0Tx Single software request flag for SSP0 Tx. 0
1 SoftReqSSP0Rx Single software request flag for SSP0 Rx. 0
2 SoftReqSSP1Tx Single software request flag for SSP1 Tx. 0
3 SoftReqSSP1Rx Single software request flag for SSP1 Rx. 0
4 SoftReqSDMMC Single software request flag for SD/MMC. 0
5 SoftSReqI2S0 Single software request flag for i2S0. 0
6 SoftSReqI2S1 Single software request flag for i2S1. 0
31:7 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
8.11 Software Last Burst Request Register (DMACSoftLBreq -
0xFFE0 4028)
The DMACSoftLBReq Register is read/write and enables DMA last burst requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
completed. Writing 0 to this register has no effect. Reading the register indicates which
sources are requesting last burst DMA transfers. A request can be generated from either
a peripheral or the software request register. Table 28–525 shows the bit assignments of
the DMACSoftLBReq Register.
Table 525. Software Last Burst Request register (DMACSoftLBReq - address 0xFFE0 4028)
bit description
Bit Symbol Description Reset
Value
3:0 - Reserved, user software should not write ones to reserved NA
bits. The value read from a reserved bit is not defined.
4 SoftLBReqSDMMC Software last burst request flags for SD/MMC. 0
31:5 - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
NA
8.12 Software Last Single Request Register (DMACSoftLSReq -
0xFFE0 402C)
The DMACSoftLSReq Register is read/write and enables DMA last single requests to be
generated by software. A DMA request can be generated for each source by writing a 1 to
the corresponding register bit. A register bit is cleared when the transaction has
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