UM10211 - Standard ICs

NXP Semiconductors
UM10211
Chapter 5: LPC2300 EMC
The memory controller state machine is not busy performing accesses to external
memory, and an AHB interface is writing to a different buffer.
Note: For dynamic memory, the smallest buffer flush is a quadword of data. For static
memory, the smallest buffer flush is a byte of data.
5.2.2 Read buffers
Read buffers are used to:
• Buffer read requests from memory. Future read requests that hit the buffer read the
data from the buffer rather than memory, reducing transaction latency.
Convert all read transactions into quadword bursts on the external memory interface.
This enhances transfer efficiency for dynamic memory.
• Reduce external memory traffic. This improves memory bandwidth and reduces
power consumption.
Read buffer operation:
• If the buffers are enabled and the read data is contained in one of the buffers, the read
data is provided directly from the buffer.
• If the read data is not contained in a buffer, the LRU buffer is selected. If the buffer is
dirty (contains write data), the write data is flushed to memory. When an empty buffer
is available the read command is posted to the memory.
A buffer filled by performing a read from memory is marked as not-dirty (not containing
write data) and its contents are not flushed back to the memory controller unless a
subsequent AHB transfer performs a write that hits the buffer.
5.3 Memory controller state machine
The memory controller state machine comprises a static memory controller and a dynamic
memory controller.
5.4 Pad interface
6. Memory bank select
The pad interface block provides the interface to the pads. The pad interface uses
feedback clocks, FBCLKIN[3:0], to resynchronize SDRAM read data from the off-chip to
on-chip domains.
Two independently-configurable memory chip selects are supported. Pins CS1 and CS0
are used to select static memory devices.
Static memory chip select ranges are each 64 kilobytes in size. Table 5–44 shows the
address ranges of the chip selects.
Table 44. Memory bank selection
Chip Select Pin Address Range Memory Type Size of Range
CS0 0x8000 000 - 0x8000 FFFF Static 64 kB
CS1 0x8100 000 - 0x8100 FFFF Static 64 kB
UM10211_1
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User manual Rev. 01 — 27 March 2007 59 of 613