UM10211 - Standard ICs

NXP Semiconductors
UM10211
Chapter 27: LPC2300 Flash memory
4.1 Memory map after any reset
The flash portion of the boot block is 8 kB in size and resides in the top portion (starting
from 0x0007 E000) of the on-chip flash memory. After any reset the entire boot block is
also mapped to the top of the on-chip memory space i.e. the boot block is also visible in
the memory region starting from the address 0x7FFF E000. The flash boot loader is
designed to run from this memory area, but both the ISP and IAP software use parts of the
on-chip RAM. The RAM usage is described later in this chapter. The interrupt vectors
residing in the boot block of the on-chip flash memory also become active after reset, i.e.,
the bottom 64 bytes of the boot block are also visible in the memory region starting from
the address 0x0000 0000. The reset vector contains a jump instruction to the entry point
of the flash boot loader software.
2.0 GB
2.0 GB - 8 kB
8 kB BOOT BLOCK
(RE-MAPPED FROM TOP OF FLASH MEMORY)
(BOOT BLOCK INTERRUPT VECTORS)
0x7FFF FFFF
0x7FFF E000
8 kB BOOT BLOCK RE-MAPPED TO
HIGHER ADDRESS RANGE
0x0007 FFFF
0x0007 E000
ON-CHIP FLASH MEMORY
0.0 GB
ACTIVE INTERRUPT VECTORS
FROM THE BOOT BLOCK
0x0000 0000
Fig 105.Map of lower memory after reset
4.1.1 Criterion for Valid User Code
Criterion for valid user code: The reserved ARM interrupt vector location (0x0000 0014)
should contain the 2’s complement of the check-sum of the remaining interrupt vectors.
This causes the checksum of all of the vectors together to be 0. The boot loader code
disables the overlaying of the interrupt vectors from the boot block, then checksums the
interrupt vectors in sector 0 of the flash. If the signatures match then the execution control
is transferred to the user code by loading the program counter with 0x0000 0000. Hence
the user flash reset vector should contain a jump instruction to the entry point of the user
application code.
If the signature is not valid, the auto-baud routine synchronizes with the host via serial port
0. The host should send a ’’ (0x3F) as a synchronization character and wait for a
response. The host side serial port settings should be 8 data bits, 1 stop bit and no parity.
The auto-baud routine measures the bit time of the received synchronization character in
terms of its own frequency and programs the baud rate generator of the serial port. It also
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User manual Rev. 01 — 27 March 2007 514 of 613