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UM10211 - Standard ICs

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NXP Semiconductors<br />

<strong>UM10211</strong><br />

Chapter 19: LPC2300 I 2 C0, I 2 C1, I 2 C2<br />

time limit<br />

STA flag<br />

STO flag<br />

SDA line<br />

SCL line<br />

start<br />

condition<br />

Fig 92. Forced access to a busy I 2 C bus<br />

STA flag<br />

(2)<br />

(3)<br />

SDA line<br />

(1)<br />

(1)<br />

SCL line<br />

start<br />

condition<br />

(1) Unsuccessful attempt to send a start condition.<br />

(2) SDA line is released.<br />

(3) Successful attempt to send a start condition. State 08H is entered.<br />

Fig 93. Recovering from a bus obstruction caused by a low level on SDA<br />

8.12 I 2 C State service routines<br />

This section provides examples of operations that must be performed by various I 2 C state<br />

service routines. This includes:<br />

• Initialization of the I 2 C block after a Reset.<br />

• I 2 C Interrupt Service.<br />

• The 26 state service routines providing support for all four I 2 C operating modes.<br />

8.12.1 Initialization<br />

In the initialization example, the I 2 C block is enabled for both master and slave modes.<br />

For each mode, a buffer is used for transmission and reception. The initialization routine<br />

performs the following functions:<br />

• I2ADR is loaded with the part’s own slave address and the general call bit (GC).<br />

• The I 2 C interrupt enable and interrupt priority bits are set.<br />

• The slave mode is enabled by simultaneously setting the I2EN and AA bits in I2CON<br />

and the serial clock frequency (for master modes) is defined by loading CR0 and CR1<br />

in I2CON. The master routines must be started in the main program.<br />

<strong>UM10211</strong>_1<br />

© NXP B.V. 2007. All rights reserved.<br />

User manual Rev. 01 — 27 March 2007 442 of 613

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