UM10211 - Standard ICs

NXP Semiconductors
UM10211
Chapter 19: LPC2300 I 2 C0, I 2 C1, I 2 C2
MR
successful
transmission to
a Slave
transmitter
S
SLA
R
A
DATA
A
DATA
A
P
08H
40H
50H
58H
next transfer
started with a
Repeated Start
condition
S
SLA
R
10H
Not Acknowledge
received after the
Slave address
A
P
W
48H
to Master
transmit
mode, entry
= MT
arbitration lost in
Slave address or
Acknowledge bit
A OR A
other Master
continues
A
other Master
continues
38H
38H
arbitration lost
and addressed
as Slave
A
other Master
continues
68H 78H B0H
to corresponding
states in Slave
mode
from Master to Slave
from Slave to Master
DATA
n
A
any number of data bytes and their associated
Acknowledge bits
this number (contained in I2STA) corresponds to a defined state of
the I 2 C bus
Fig 88. Format and States in the Master Receiver mode
UM10211_1
© NXP B.V. 2007. All rights reserved.
User manual Rev. 01 — 27 March 2007 431 of 613