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UM10211 - Standard ICs

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NXP Semiconductors<br />

<strong>UM10211</strong><br />

Chapter 13: LPC2300 USB device<br />

Table 266. USB Receive Packet Length register (USBRxPlen - address 0xFFE0 C220) bit<br />

description<br />

Bit Symbol Value Description Reset<br />

value<br />

9:0 PKT_LNGTH - The remaining number of bytes to be read from the<br />

currently selected endpoint’s buffer. When this field<br />

decrements to 0, the RxENDPKT bit will be set in<br />

USBDevIntSt.<br />

0<br />

10 DV Data valid. This bit is useful for isochronous endpoints.<br />

Non-isochronous endpoints do not raise an interrupt when<br />

an erroneous data packet is received. But invalid data<br />

packet can be produced with a bus reset. For isochronous<br />

endpoints, data transfer will happen even if an erroneous<br />

packet is received. In this case DV bit will not be set for the<br />

packet.<br />

0 Data is invalid.<br />

1 Data is valid.<br />

11 PKT_RDY - The PKT_LNGTH field is valid and the packet is ready for<br />

reading.<br />

31:12 - - Reserved, user software should not write ones to reserved<br />

bits. The value read from a reserved bit is not defined.<br />

8.6.3 USB Transmit Data register (USBTxData - 0xFFE0 C21C)<br />

For an IN transaction, the CPU writes the endpoint data into this register. Before writing to<br />

this register, the WR_EN bit and LOG_ENDPOINT field of the USBCtrl register should be<br />

set appropriately, and the packet length should be written to the USBTxPlen register. On<br />

writing this register, the data is written to the selected endpoint buffer. The data is in little<br />

endian format: the first byte sent on the USB bus will be the least significant byte of<br />

USBTxData. USBTxData is a write only register.<br />

Table 267. USB Transmit Data register (USBTxData - address 0xFFE0 C21C) bit description<br />

Bit Symbol Description Reset value<br />

31:0 TX_DATA Transmit Data. 0x0000 0000<br />

8.6.4 USB Transmit Packet Length register (USBTxPLen - 0xFFE0 C224)<br />

This register contains the number of bytes transferred from the CPU to the selected<br />

endpoint buffer. Before writing data to USBTxData, software should first write the packet<br />

length (≤ MaxPacketSize) to this register. After each write to USBTxData, hardware<br />

decrements USBTxPLen by 4. The WR_EN bit and LOG_ENDPOINT field of the USBCtrl<br />

register should be set to select the desired endpoint buffer before starting this process.<br />

For data buffers larger than the endpoint’s MaxPacketSize, software should submit data in<br />

packets of MaxPacketSize, and send the remaining extra bytes in the last packet. For<br />

example, if the MaxPacketSize is 64 bytes and the data buffer to be transferred is of<br />

length 130 bytes, then the software sends two 64-byte packets and the remaining 2 bytes<br />

in the last packet. So, a total of 3 packets are sent on USB. USBTxPLen is a write only<br />

register.<br />

0<br />

0<br />

NA<br />

<strong>UM10211</strong>_1<br />

© NXP B.V. 2007. All rights reserved.<br />

User manual Rev. 01 — 27 March 2007 284 of 613

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