UM10211 - Standard ICs

NXP Semiconductors
UM10211
Chapter 18: LPC2300 SD_MMC
• CMD Bidirectional command/response signal
• DAT[3:0] Bidirectional data signals
4.3 MCI adapter
Figure 18–73 shows a simplified block diagram of the MCI adapter.
MULTIMEDIA CARD INTERFACE
CONTROL
UNIT
MCICLK
MCIPWR
APB BUS
APB
INTERFACE
ADAPTER
REGISTERS
COMMAND
PATH
MCICMD
FIFO
DATA PATH
MCIDATA [3:0]
Fig 73. MCI adapter
The MCI adapter is a multimedia/secure digital memory card bus master that provides an
interface to a multimedia card stack or to a secure digital memory card. It consists of five
subunits:
• Adapter register block
• Control unit
• Command path
• Data path
• Data FIFO
4.3.1 Adapter register block
The adapter register block contains all system registers. This block also generates the
signals that clear the static flags in the multimedia card. The clear signals are generated
when 1 is written into the corresponding bit location of the MCIClear register.
4.3.2 Control unit
The control unit contains the power management functions and the clock divider for the
memory card clock.
There are three power phases:
• Power-off
• Power-up
• Power-on
UM10211_1
© NXP B.V. 2007. All rights reserved.
User manual Rev. 01 — 27 March 2007 393 of 613