Navy Electricity and Electronics Training Series - Historic Naval ...

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You should recall from NEETS, Module 13, Introduction to Number Systems, Boolean Algebra, andLogic Circuits, that a basic flip-flop is a device having two stable states and two input terminals (or typesof input signals), each of which corresponds to one of the two states. The flip-flop remains in one stateuntil caused to change to the other state by application of an input voltage pulse.A J-K flip-flop differs from the basic flip-flop because it has a third input terminal. A clock pulse, ortrigger, is usually applied to this input to ensure proper timing in the circuit. An input signal must occur atthe same time as the clock pulse to change the state of the flip-flop. The conventional J-K flip-flop circuitin figure 1-28 requires approximately 40 discrete components, 200 connections, and 300 processingoperations. Each of these 300 operations (seals and connections) represents a possible source of failure. Ifall the elements of this circuit are integrated into one chip of silicon, the number of connections drops toapproximately 14. This is because all circuit elements are intraconnected inside the package and the 300processing operations are reduced to approximately 30. Figure 1-29 represents a size comparison of adiscrete J-K circuit and an integrated circuit of the same type.Figure 1-28.—Schematic diagram of a J-K flip-flop.1-26
Figure 1-29.—J-K flip-flop discrete component and an IC.IC PACKAGE LEAD IDENTIFICATION (NUMBERING)When you look at an IC package you should notice that the IC could be connected incorrectly into acircuit. Such improper replacement of a component would likely result in damage to the equipment. Forthis reason, each IC has a REFERENCE MARK to align the component for placement. The dual inlinepackage (both plastic and ceramic) and the flat pack have a notch, dot, or impression on the package.When the package is viewed from the top, pin 1 will be the first pin in the counterclockwise direction nextto the reference mark. Pin 1 may also be marked directly by a hole or notch or by a tab on it (in this casepin 1 is the counting reference). When the package is viewed from the top, all other pins are numberedconsecutively in a counterclockwise direction from pin 1, as shown in figure 1-30, views (A) and (B).1-27
Page 1 and 2: NONRESIDENTTRAININGCOURSESEPTEMBER
Page 3 and 4: PREFACEBy enrolling in this self-st
Page 5: TABLE OF CONTENTSCHAPTERPAGE1. Micr
Page 8 and 9: Module 11, Microwave Principles, ex
Page 10 and 11: INSTRUCTIONS FOR TAKING THE COURSEA
Page 12 and 13: THIS PAGE LEFT BLANK INTENTIONALLY.
Page 15 and 16: CHAPTER 1MICROELECTRONICSLEARNING O
Page 17 and 18: VACUUM-TUBE EQUIPMENTVacuum tubes w
Page 19 and 20: SOLID-STATE DEVICESNow would be a g
Page 21 and 22: FILM INTEGRATED CIRCUITS are broken
Page 23 and 24: Development of a microelectronic de
Page 25 and 26: Figure 1-9.—Crystal furnace.The c
Page 27 and 28: Figure 1-12.—Planar-diffused tran
Page 29 and 30: Figure 1-14.—Vacuum evaporation o
Page 31 and 32: Figure 1-17.—Cathode-sputtering m
Page 33 and 34: Q23. How do the two types of monoli
Page 35 and 36: Figure 1-21A.—TO-5 mounting PLUG-
Page 37 and 38: Dual Inline PackageThe dual inline
Page 39: wafer, as shown in figure 1-27. Thi
Page 43 and 44: Figure 1-31.—Lead numbering for a
Page 45 and 46: Figure 1-34.—Manufacturer's Data
Page 47: comparison to the distance between
Page 50 and 51: LEVEL III.—Drawers or pull-out ch
Page 52 and 53: Conductors located several layers b
Page 54 and 55: Figure 1-43A.—Evolution of modula
Page 56 and 57: ENVIRONMENTAL CONSIDERATIONSThe env
Page 58 and 59: SUMMARYThis topic has presented inf
Page 60 and 61: Rapid development has resulted in i
Page 62 and 63: Large DIPs are being used to packag
Page 64 and 65: MINIATURE ELECTRONICS are card asse
Page 66 and 67: Three methods of interconnecting ci
Page 68 and 69: ANSWERS TO QUESTIONS Q1. THROUGH Q5
Page 70 and 71: A43. Conventional printed circuit b
Page 72 and 73: Upon satisfactory completion of a 2
Page 74 and 75: One such improvement in system test
Page 76 and 77: those that should be observed when
Page 78 and 79: Figure 2-2.—Low voltage Handpiece
Page 80 and 81: Figure 2-6.—Rotary-drive machine
Page 82 and 83: Figure 2-9.—Pana Vise.HAND TOOLSF
Page 84 and 85: Figure 2-10a.—Pliers.TweezersView
Page 86 and 87: Even though all the items are not u
Page 88 and 89: Figure 2-14.—Stereoscopic zoom mi
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other than eutectic, go through a p
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A1. Chief of Naval Operations (CNO)
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CAUTIONTHIS SECTION IS NOT, IN ANY
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The coating material can best be id
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Figure 3-3.—Rotary tool conformal
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Figure 3-4A.—Eyelets (interfacial
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Figure 3-5B.—Clinched leads. SEMI
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Figure 3-8A.—Terminals. PIN AND T
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Figure 3-8E.—Terminals. SOLDER CU
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Figure 3-10.—Solder wicking.This
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Figure 3-12B.—Motorized vacuum/pr
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INSTALLATION AND SOLDERING OF PRINT
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Figure 3-15.—Component arrangemen
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Figure 3-16.—Thermal shunt.APPLIC
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Removal of Plug-In DIPsTo remove pl
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Figure 3-19.—TO mounting techniqu
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Figure 3-21.—Flat pack in protect
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Figure 3-23.—Pcb conductor damage
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REPAIRING DELAMINATED CONDUCTORS.
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5. The repair is completed using th
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SAFETYSafety is a subject of utmost
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OBJECT OR PROCESSWORK SURFACESFLOOR
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8. When moving an ESDS device or as
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Power ToolsHazards associated with
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dispensers will prevent many accide
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A GOOD SOLDER JOINT is bright and s
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ANSWERS TO QUESTIONS Q1. THROUGH Q3
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APPENDIX IGLOSSARYALLOWANCE PARTS L
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MODULAR PACKAGING—Circuit assembl
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APPENDIX IIREFERENCE LISTCHAPTER ON
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Microelectronics—Continuedpackagi
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Assignment QuestionsInformation: Th
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1-7. Which of the following charact
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1-24. Vacuum evaporation and cathod
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___________________________________
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1-49. Ground planes and shielding a
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1-65. Which of the following types
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ASSIGNMENT 2Textbook assignment: Ch
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2-20. Turret, fork, and hook termin
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2-39. Component leads may be clippe
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2-52. To ensure a good mechanical b
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Navy Electricity and Electronics Training Series - Historic Naval ...

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