NASA Scientific and Technical Aerospace Reports

20060002122 Texas A&M Univ., College Station, TX, USA
Dynamic Latch Design for VLSI Array Processors
Leung, Yu-Ying J.; Shanblatt, Michael; 1987 IEEE International Symposium on Circuits and Systems, Volume 2; 1987,
pp. 390-393; In English; See also 20060002103; Copyright; Avail.: Other Sources
Dynamic latches or registers are required for high speed, synchronous processor designs, especially using VLSI (Very
Large Scale Integration). Design parameter tradeoffs and performance results for non-testable and testable dynamic latches
specifically suited for VLSI array processors are presented. The latches are designed to be directly tessellated amid the array
of processing elements and are further modified to enable a scanning operation for built-in testability. Results indicate that the
increase in overall chip area and propagation time due to the additional scanning function are quite low and insignificant in
many design scenarios. An addition of three I/O lines is required for the scanning function. Finally, a compactness ratio is used
to represent the circuit density or complexity. Results further indicate the effect on the overall density as the number of
communication signal paths increase.
Author
Latches; Very Large Scale Integration; Data Processing
20060002178 National Chiao Tung Univ., Hsinchu, Taiwan, Province of China
Design of Adaptive Electronic Hybrid for Digital Subscriber Loops
Che-Ho, Wei; Neng-An, Kuo; 1987 IEEE International Symposium on Circuits and Systems, Volume 2; 1987, pp. 434-437;
In English; See also 20060002103
Contract(s)/Grant(s): NSC-76-0404-E009-06; Copyright; Avail.: Other Sources
Adaptive electronic hybrid is proposed to replace the conventional fixed hybrid in the digital subscriber loop to reduce
the burden of echo canceller. The theory of adaptive electronic hybrid is briefly reviewed and its convergence characteristics
are then simulated on computer. Two design methods for hardware implementation are discussed. The hardware is
implemented and tested under stimulated line conditions. Experimental results show that the realized hardware can achieve
about 30 dB transhybrid loss.
Author
Simulators; Hardware-in-the-Loop Simulation; Loops
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COMPUTER PROGRAMMING AND SOFTWARE
Includes software engineering, computer programs, routines, algorithms, and specific applications, e.g., CAD/CAM. For computer
software applied to specific applications, see also the associated category.
20060000049 Research and Technology Organization, Neuilly-sur-Seine, France
Validation, Verification and Certification of Embedded Systems
October 2005; 90 pp.; In English; See also 20060000050 - 20060000055; Original contains color illustrations
Report No.(s): RTO-TR-IST-027; AC/323(IST-027)TP/31; Copyright; Avail.: CASI: C01, CD-ROM: A05, Hardcopy
This report is the final report resulting from the deliberations of the NATO Research Task Group on the Validation,
Verification and Certification of Embedded Systems (IST-027/RTG-009). The report discusses the important role of embedded
systems in both the civil and military contexts. Given the importance, the validation, verification and certification (VV&C)
of such systems are of increasing concern. The report discusses the current landscape of VV&C, expected evolution, and also
identifies standards of note. The report concludes with various conclusions and recommendations drawn from the task group
s deliberations. In general terms, the Task Group found that their discussions were not specific to embedded systems; the
problems of verification, validation and certification encompass many kinds of systems. The Task Group observed that trust,
in itself, is a sociological-technical matter; it is not attained wholly through technical means. The Task Group concluded that
certification can be used successfully to increase our confidence in systems. However, that confidence could be expensive. We
have observed that certification is working with bounded problems and has been particularly successful in the Avionics arena.
However, we also note a couple of cautionary aspects to the use of certification in the military realm. Furthermore, we found
that current technical capabilities are not well developed for the verification, validation and certification of component reuse,
for the rigorous predictability of the behavior of networks and system, nor for determining the non-interference of multi-level
critical processes. Numerous research trends of VV&C methods were identified including the increasing use of Commercial-
Off-The-Shelf systems, increasing occurrence of systems of systems, an increasing number of unharmonised standards,
ongoing reality of striving for cheaper and faster systems, increasing adoption of formal modeling and analysis techniques in
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