NASA Scientific and Technical Aerospace Reports
NASA Scientific and Technical Aerospace Reports
NASA Scientific and Technical Aerospace Reports
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20060001681 University of Southwestern Louisiana, Lafayette, LA, USA<br />
A Quadratic Residue Processor for Complex DSP Applications<br />
Bayoumi, Magdy A.; IEEE International Conference on Acoustics, Speech, <strong>and</strong> Signal Processing (ICASSP ‘87); Volume 1;<br />
1987, pp. 475-478; In English; See also 20060001583; Copyright; Avail.: Other Sources<br />
The performance requirements for high speed realtime Digital Signal Processing (DSP) applications, coupled with the<br />
hardware complexity for manipulating data over complex fields can often exceed the capacity of the traditional signal<br />
processors. In this paper, a signal processor for complex DSP applications has been developed. It is based on using the<br />
Quadratic Residue Number System (QRNS) which establishes parallelism on the functional level <strong>and</strong> optimizes the required<br />
hardware. By employing QRNS, the interaction between the real <strong>and</strong> imaginary channels in complex arithmetic is eliminated,<br />
<strong>and</strong> two real multiplications are only required to perform complex multiplication. The processor design is optimized for<br />
efficient computation of the FFT <strong>and</strong> signal processing operations based on FFT such as FIR filtering, IFFT, convolution,<br />
correlation <strong>and</strong> multiplication. This computational versatility is’achieved through macroprogrammability. FIFO’s First-in<br />
First-out) are used for storing the input, intermediate, <strong>and</strong> output data (<strong>and</strong> coefficients). Customized look-up tables are<br />
employed for implementing the residue operations. The developed processor can be employed either as a st<strong>and</strong>-alone<br />
processor or as a peripheral processor (Co-processor).<br />
Author<br />
Signal Processing; Signal Analyzers<br />
20060001682 Cornell Univ., Ithaca, NY, USA<br />
A Bit-Serial Floating-Point Complex Multiplier-Accumulator for Fault-Tolerant Digital Signal Processing Arrays<br />
Chau, Paul M.; Chew, Kay C.; Ku, Walter H.; IEEE International Conference on Acoustics, Speech, <strong>and</strong> Signal Processing<br />
(ICASSP ‘87); Volume 1; 1987, pp. 483-486; In English; See also 20060001583; Copyright; Avail.: Other Sources<br />
This paper presents the extension of bit-serial architectures for next-generation signal processing chips with floating-point<br />
<strong>and</strong> fault-tolerant capabilities. The architecture <strong>and</strong> design of a novel bit-serial floating-point complex multiplier-accumulator<br />
CMAC) hardware is described. Fault-tolerant features are incorporated by embedding these CMACs into dynamically<br />
reconfigurable systolic arrays. The arrays can be utilized for FIR filtering, convolution, correlation <strong>and</strong> other signal processing<br />
applications based upon multiply-accumulate. Furthermore, these computational cores can be incorporated into more complex<br />
processors which perform FFT-type computations. With the advent of submicron VLSI technology, the smaller device<br />
geometries will afford either the implementation of greater functionality <strong>and</strong>/or computational capabilities. These increased<br />
capabilities will enable the solution of more dem<strong>and</strong>ing signal processing problems where there exist broad dynamic range<br />
requirements or low signal to noise conditions. But also associated with the increased functionality is the greater need for fault<br />
tolerance in high performance applications. Our bit-serial floating-point complex multiplier-accumulator wi11 serve many<br />
such signal processing needs.<br />
Author<br />
Accumulators; Computer Techniques; Fast Fourier Transformations; Floating Point Arithmetic; Signal Processing<br />
20060001683 Erlangen-Nuernberg Univ., Erlangen, Germany<br />
OCF-A New Coding Algorithm for High Quality Sound Signals<br />
Br<strong>and</strong>enburg, Karlheinz; IEEE International Conference on Acoustics, Speech, <strong>and</strong> Signal Processing (ICASSP ‘87); Volume<br />
1; 1987, pp. 5.1.1 - 5.1.4; In English; See also 20060001583; Copyright; Avail.: Other Sources<br />
Optimum Coding in the Frequency domain (0CF) uses entropy coding of quantized spectral coefficients to efficiently code<br />
high quality sound signals with 3 bits/sample. In an iterative algorithm psychoacoustic weighting is used to get the<br />
quantization noise to be masked in every critical b<strong>and</strong>. The coder itself uses iterative quantizer control to get each data block<br />
to be coded with a fixed number of bits. Details about the OCF-Coder are presented together with information about the<br />
codebook needed <strong>and</strong> the training for the entropy coder. An algorithm for calculating a noise-to-mask ratio is presented which<br />
helps to identify, where quantization noise could be audible.<br />
Author<br />
Algorithms; Coders; Hearing; Frequencies; Coding<br />
20060001685 Institute of Sound <strong>and</strong> Vibration Research, Southampton, UK<br />
Casual Constraints on the Active Control of Sound<br />
Nelson, P. A.; Hammond, J. K.; Elliott, S. J.; IEEE International Conference on Acoustics, Speech, <strong>and</strong> Signal Processing<br />
(ICASSP ‘87); Volume 1; 1987, pp. 5.2.1 - 5.2.4; In English; See also 20060001583; Copyright; Avail.: Other Sources<br />
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