NASA Scientific and Technical Aerospace Reports
NASA Scientific and Technical Aerospace Reports
NASA Scientific and Technical Aerospace Reports
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value of the error signal in the coefficient update equation. It is found to be easy to implement <strong>and</strong> gives advantages over the<br />
conventional algorithm under certain conditions.<br />
Author<br />
Least Squares Method; Mean Square Values; Algorithms; Very Large Scale Integration; Signal Processing<br />
20060002167 Naval Postgraduate School, Monterey, CA, USA<br />
A Recursive Least Squares Algorithm for Gray-Markel Lattice<br />
Tummala, Murali; Parker, Sydney R.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987,<br />
pp. 436-441; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />
This paper derives a new recursive least squares algorithm for a 2-multiplier Gray-Markel lattice filter realizing an infinite<br />
impulse response (IIR) transfer function. The algorithm consists of two parts - updating the lattice reflection coefficients, <strong>and</strong><br />
updating the filter tap weights. The proposed algorithm differs from those presented previously in that it does not incorporate<br />
a gradient approximation step in its derivation. Also the absence of an adaptation constant, that usually requires a trial <strong>and</strong> error<br />
selection, makes it a more robust algorithm at the expense of more computations. In the following, we present a detailed<br />
derivation of the algorithm together with computer simulation results showing its faster rate of convergence.<br />
Author<br />
Transfer Functions; Algorithms; Computerized Simulation; Gradients; Lattices; Convergence<br />
20060002170 Zhejiang Institute of Technology, Hangzhou, China<br />
An Application of Bin-Packing to Building Block Placement<br />
Chun-hong, Chen; Mei-lun, Liu; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987, pp. 576-579;<br />
In English; See also 20060002103; Copyright; Avail.: Other Sources<br />
More <strong>and</strong> more attention has been paid to building block placement (BBP) problem in the automatic layout design of<br />
VLSI. This paper describes an application of bin-packing to BBP which is based on a kind of classification of blocks. The<br />
algorithm tries to minimize the chip size required while the routing is facilitated, <strong>and</strong> provides a new approach to the<br />
constructive initial BBP. Experimental results have shown the excellent performance of the algorithm.<br />
Author<br />
Algorithms; Very Large Scale Integration; Automatic Control<br />
20060002171 Northeastern Univ., Boston, MA, USA<br />
Graph Partitioning Approach to Speech Decoding<br />
Venkatesh, C. G.; Deller, J. R., Jr.; Cozzens, M. B.; Hsu, D.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems,<br />
Volume 2; 1987, pp. 580-583; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />
A partitioning theorem for planar graphs due to Lipton <strong>and</strong> Tarjan is applied to a class of decoding problems. A graph<br />
consisting of N nodes can be searched for an optimal decoding path using only O(/N) node evaluations <strong>and</strong> with less risk of<br />
pruning the correct path than with conventional methods. An example application to speech recognition is given.<br />
Author<br />
Decoding; Speech Recognition; Mathematical Models; Graphs (Charts)<br />
20060002172 Illinois Univ. at Urbana-Champaign, Urbana, IL, USA<br />
JADE: A Hierarchical Switch Level Timing Simulator<br />
Lai, Feipei; Rao, Vasant B.; Trick, Timothy N.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987,<br />
pp. 592-595; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />
JADE is a hierarchical switch-level timing simulator for CMOS circuits written in LISP. The entire circuit is first<br />
partitioned inlo various blocks at each level of the hierarchy. The signal delays in JADE are computed hierarchically on a<br />
block-by-block basis. Strongly connected components are deleeled <strong>and</strong> collapsed into a single vertex thereby resulting in a<br />
directed acyclic condensation graph. JADE then simulates the blocks corresponding to the veriices of the condensation graph<br />
in topological order. JADE then computes two parameters for each circuit node, namely, the earliest starting time computed<br />
by scanning the vertices of the condensation graph lhe forward order <strong>and</strong> the latest completion time oblained by scanning in<br />
the reverse order. A node is said to be critical if both parameters are equal. A block is said to be critical if it has a critical input<br />
node <strong>and</strong> a critical outpul node. A critical path is then defined to be the longest directed path in the graph composed only of<br />
critical blocks <strong>and</strong>/or subcircuits. The hierarchical approach used in JADE saves a considerable amount of memory space <strong>and</strong><br />
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