05.12.2012 Views

NASA Scientific and Technical Aerospace Reports

NASA Scientific and Technical Aerospace Reports

NASA Scientific and Technical Aerospace Reports

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

the program executes at least 100 times as fast as SPICE2, yet produces discrete waveforms with timing typically within l0<br />

percent of SPICE2.<br />

Author<br />

Simulators; Switches; Metal Oxide Semiconductors; Circuits; Time Lag<br />

20060002173 California Univ., Davis, CA, USA<br />

A Simulation Model of the Composite ‘Pinch Resistor’ Device Structure on Linear Bipolar Semi-Custom Integrated<br />

Circuits<br />

Current, K. W.; Okahata, D. M.; Edwards, F. A.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2;<br />

1987, pp. 596-599; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />

A circuit simulaiton model of the composite ‘pinch resistor’ device structure on linear bipolar semi-custom integrated<br />

circuits is presented. This model represents the operation of a pair of pinch resistors, <strong>and</strong> all of their parasitic devices in their<br />

isolated epi region. Parasitics included in the model are the JFETs, <strong>and</strong> the vertical <strong>and</strong> lateral pnp transistors associated with<br />

the pinch resistors. Good agreement between simulated <strong>and</strong> experimental results has been found in DC, AC, <strong>and</strong> transient<br />

circuit examples. With this new model, the behavior of this useful composite set of devices may be more completely depicted<br />

in circuit simulations.<br />

Author<br />

Resistors; Integrated Circuits; Bipolarity; Simulation; Mathematical Models<br />

20060002174 Illinois Univ., IL, USA<br />

An Event-Driven, Relaxation-Based Multirate Integration Scheme for Circuit Simulation<br />

Saleh, Resve A.; Newton, A. Richard; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987,<br />

pp. 600-603; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />

Recently, a number of new circuit simulators have been developed which reduce simulation runtimes by exploiting two<br />

properties of waveforms called ‘latency’ <strong>and</strong> ‘multirate behavior’. While these simulators have successfully reduced the<br />

overall runtimes, it has been observed that the speed improvement varies from one circuit to another. In this paper, simple<br />

operations are described to compute upper bounds on the speed improvement when these two waveform properties are<br />

exploited for a given circuit. These upper bounds are used to evaluate the performance of two relaxation-based algorithms.<br />

The first algorithm, called Iterated Timing Analysis (ITA), exploits the latency property <strong>and</strong> has been described previously.<br />

The second algorithm, which is described in detail in this paper, is a new multirate integration scheme based on ITA. It permits<br />

the use of different step sizes to solve different components of a system <strong>and</strong> uses a novel approach called ‘selective-backup’<br />

to h<strong>and</strong>le step rejections. The two algorithms have been implemented in a new program called SPLICE3 <strong>and</strong> a number of<br />

simulation results are presented in this paper.<br />

Author<br />

Circuits; Simulation; Algorithms; Iteration; Relaxation Method (Mathematics)<br />

20060002175 Arizona Univ., AZ, USA<br />

A Device Simulation Tool for High-Voltage Bipolar Devices<br />

Qiming, Wu; Cellier, Francois E.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987,<br />

pp. 612-616; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />

This paper presents a device simulation tool for high-voltage bipolar devices. This two dimensional device simulation<br />

software package can be used by the design engineer for the optimization of topology <strong>and</strong> physical parameters of a device in<br />

order to Increase its breakdown voltage. A variety of applications have indicated that this tool is a versatile, user-friendly, <strong>and</strong><br />

numerically efficient device simulator. In this paper, some interesting results are shown.<br />

Author<br />

Bipolarity; Computerized Simulation; High Voltages; Topology<br />

20060002176 North Carolina State Univ., Raleigh, NC, USA<br />

Sensitivity Analysis of PWL Circuits<br />

Elcherif, Y. S.; Lin, P. M.; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987, pp. 621-624; In<br />

English; See also 20060002103; Copyright; Avail.: Other Sources<br />

Basic relations are given for transient sensitivity computation of piecewise linear (PWL) circuits using the adjoint network<br />

<strong>and</strong> sensitivity network approaches. A method is presented for computer aided formulation <strong>and</strong> solution of the PWL transient<br />

76

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!