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NASA Scientific and Technical Aerospace Reports

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difference in the synchronous frequency of video signal among PCs will become the key which recognizes the target. In the<br />

experiment (2), we succeeded from about 4 meters away place with frequency which is inside of VCCI regulations. In the<br />

experiment (3), we succeeded from about 30 meters away place, <strong>and</strong> we found that the position relation between a probe <strong>and</strong><br />

AC adapter is dependent on results.<br />

Author<br />

Personal Computers; Interception; Images; Electromagnetic Radiation<br />

20060002100 Hitachi Ltd., Japan<br />

Hysteresis Signature <strong>and</strong> Its Related Technologies to Maintain the Digital Evidence for Network Activities in Future<br />

Society<br />

Toyoshima, Hisachi; Miyazaki, Kunihiko; Journal of the National Institute of Information <strong>and</strong> Communications Technology.<br />

Special Issue on Information Security, Volume 52, Nos. 1/2; March/June 2005, pp. 191-201; In English; See also<br />

20060002073; Copyright; Avail.: Other Sources<br />

Security Requirements are varied with rapid growth of Internet <strong>and</strong> mobile network in digitization progress of<br />

information. The necessity for reexamination of the security technological strategy is increasing. For example, the systematic<br />

security countermeasures which can prove having dealt with information appropriately are required in addition to direct<br />

security countermeasure such as encryption <strong>and</strong> access control. The problem of digital evidence occurs as a view which takes<br />

the lead for that. NICT started a research project ‘research <strong>and</strong> development about next-generation evidence based<br />

technologies’ in 2001, <strong>and</strong> Hitachi tackled this. This paper reports overview of results of the research project <strong>and</strong> related topics<br />

which contain hysteresis signature for long-term documents <strong>and</strong> its verification technologies.<br />

Author<br />

Access Control; Digital Techniques; Hysteresis; Signatures<br />

20060002106 Osaka Inst. of Tech., Japan<br />

Configuration <strong>and</strong> Evaluation of Systolic Array Type Convolvers<br />

Kutsuwa, Toshiro; Ebata, Katsuhiko; Mun, Minho; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2;<br />

1987, pp. 394-397; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />

We show <strong>and</strong> evaluate 2-kinds of systolic array type convolvers. One of them is the constant weight length (W-kind)<br />

convolver, <strong>and</strong> the other is the constant output length (R-kind) convolver. In W-kind, 3-types are discussed, <strong>and</strong> in R-kind<br />

3-types are also described. In the last section, Extensions to 2-D convolver from 1-D convolvers are shown.<br />

Author<br />

Systolic Arrays; Configurations; Parallel Processing (Computers)<br />

20060002123 California Univ., Berkeley, CA, USA<br />

Data Path Synthesis From Behavioral Descriptions: An Algorithmic Approach<br />

Devadas, Srinivas; Newton, A. Richard; 1987 IEEE International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987,<br />

pp. 398-401; In English; See also 20060002103; Copyright; Avail.: Other Sources<br />

This paper outlines our approach to data path synthesis from algorithmic or behavioral descriptions. Our approach<br />

involves three steps. First, a skeleton data path is synthesized from the input data flow specification using powerful algorithms<br />

for resource allocation <strong>and</strong> partitioning. This skeleton data path is pipelined using pipeline scheduling algorithms <strong>and</strong><br />

simultaneously a high level timing analysis is performed. Lastly, control is synthesized as a by-product of the data path<br />

synthesis process. Unlike previous approaches to data path synthesis, the algorithms used in the synthesis steps, extensively<br />

modify the input program while performing global optimizations on the data flow graphs, simultaneously address all aspects<br />

of the allocation process while efficiently exploring tradeoffs in the design space.<br />

Author<br />

Information Flow; Resource Allocation; Time Measurement; Musculoskeletal System; Optimization<br />

20060002150 Matsushita Electric Industrial Co. Ltd., Moriguchi, Japan<br />

SMART: Three Dimensional Process/Device Simulator Integrated on a Super-Computer<br />

Odanaka, S.; Wakabayashi, M.; Umimoto, H.; Hiroki, A.; Ohe, K.; Moriyama, K.; Iwasaki, H.; Esaki, H.; 1987 IEEE<br />

International Symposium on Circuits <strong>and</strong> Systems, Volume 2; 1987, pp. 534-537; In English; See also 20060002103;<br />

Copyright; Avail.: Other Sources<br />

This paper describes a new three-dimensional process/device integrated simulator based on the finite difference approach.<br />

150

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