Grundlagen der Digitaltechnik - Ing. H. Heuermann - FH Aachen

114 Highspeed-Datentransfer
NB7L86M
Table 9. AC CHARACTERISTICS (V CC = 2.375 V to 3.465 V, V EE = 0 V; Note 13)
Symbol Characteristic 40 C 25 C 85 C Unit
V OUTPP
Output Voltage Amplitude (@V INPPmin ) f in ≤ 4 GHz
(See Figure 7)
f in ≤ 8 GHz
Min Typ Max Min Typ Max Min Typ Max
240
125
f data Maximum Operating Data Rate 10.7 12 10.7 12 10.7 12 Gb/s
t PLH , Propagation Delay to Dx/Dx to Q/Q
t PHL Output Differential @ 1 GHz SEL/SEL to Q/Q
(See Figure 7)
t SKEW Duty Cycle Skew (Note 14)
Device to Device Skew (Note 15)
70
110
t S Set Up Time (Dx to SEL) 100 100 100 ps
t H Hold Up Time (Dx to SEL) 15 15 15 ps
t JITTER RMS Random Clock Jitter (Note 16) f in = 4 GHz
f in =8 GHz
Peak/Peak Data Dependent Jitter f data = 5 Gb/s
(Note 17)
f data =10 Gb/s
350
230
90
135
2.0
5.0
0.2
0.2
2.0
4.0
120
180
10
20
0.5
0.5
8.0
10
240
125
70
110
350
230
90
135
2.0
5.0
0.2
0.2
2.0
4.0
120
180
10
20
0.5
0.5
8.0
10
240
125
70
110
350
230
90
135
2.0
5.0
0.2
0.2
2.0
4.0
120
180
10
20
0.5
0.5
8.0
10
mV
ps
ps
ps
V INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 18)
75 400 2500 75 400 2500 75 400 2500 mV
t r Output Rise/Fall Times @ 1 GHz Q, Q
t f (20% 80%)
35 60 35 60 35 60 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board
with maintained airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range.
Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually
under normal operating conditions and not valid simultaneously.
13.Measured by forcing V INPP (TYP) from a 50% duty cycle clock source. All loading with an external R L = 50 to V CC .
Input edge rates 40 ps (20% 80%).
14.Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ @1 GHz.
15.Device to device skew is measured between outputs under identical transition @ 1 GHz.
16.Additive RMS jitter with 50% duty cycle clock signal.
17.Additive peak to peak data dependent jitter with input NRZ data (PRBS 2^23 1).
18.V INPP (MAX) cannot exceed V CC V EE . Input voltage swing is a single ended measurement operating in differential mode.
500
OUTPUT VOLTAGE AMPLITUDE (mV)
400
300
200
100
V CC V EE = 3.3 V
V CC V EE = 2.5 V
0
0
1
2
3
4
5
6
7
8
9
10
11
12
INPUT FREQUENCY (GHz)
Figure 7. Output Voltage Amplitude (V OUTPP ) versus
Input Clock Frequency (f in ) at Ambient Temperature (Typical)