PDP11 PeripheralsHbk 1972 - Trailing-Edge

The internal timer is started every time one processor has the switch in either the
Connected or Controlled positions, and the other processor requests the switch. If
the processor that is requesting the switch removes its request, the timer is
stopped .. If the processor that has the switch lets it go to Neutral, the other pro·
cessor's request will.then be honored and it will get the switch. If the processor
that has the switch re-requests it, the timer will be restarted. Should the timer
ever time-out, the switch is forced to the neutral position, and then, if a request
for the switch is waiting, the switch will honor, it. Thus, if the processor that has
the switch re-requests it at the same time that'the timer times out, the switch will
go to Neutral and then return to the first processor, since that processor had the
switch last.
If the timer is running and a processor stops or hangs because of a failure, the
switch will not be referenced within this time and will automatically go to the neutral
position, when the other processor can get the switch.
The way that the timer works means that the following rules should be followed to
prevent a processor that is hung in a program loop from holding on to the switch
by re-requesting it.
1. The re-request of the switch should not be put in basic interrupt service routi
nes, program loops, or done usi ng the T-bit trap.
2_ The re-requests should be put in the main-line program, to check that it is getting
executed as often as expected.
3. The placing of the re-requests must be carefully considered to make sure that
no legal combination of interrupts, traps and subroutine calls that cause leaving
the main-line program could result in not re-requesting the switch often
enough.
If the switch is in the connected state (as opposed to Controlled) when the timer
times out, the bus switch will wait up to 5 microseconds to synchronize with the
processor before disconnecting. If nothing is happening on the switched bus, the
bus switch will automatically switch to Neutral after that time. Thus, if the machine
is halted or hung, the switch will change position without waiting to synchronize.
This might, however, cause the processor to hang. To cause a working
processor to hang, the timer must time out and the processor must be doing a
Wait instruction. About 5 microseconds after the time-out, a device on the
switched bus must then request use of the bus (for either a DMA transfer or interrupt).
If the switch disconnects just as the processor starts to service the bus
request, the processor may hang. The way to prevent this is to make sure the
timer never times out. It should be noted that timeouts are fatal errors, and
should never occur in a correctly functioning system (the system being the combined
software and hardware).
7.2.5 * Interprocessor Communication
To enable a minimum of communication between the two processors, two bits are
provided for each processor. One bit is an interrupt enable bit; the other is a communication
bit. A processor gets an interrupt when its interrupt enable is set and
the other processor's communication bit is set. The interrupt occurs only when
the "AND"of the two bits becomes true.
In a non-fail-soft environment, these bits, in conjunction with the not-neutral bit
can be used by two processors to control the switch without having the timer go-
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