PDP11 PeripheralsHbk 1972 - Trailing-Edge

DPll-KA DPll
H312A DP11-DA
Internal clock option. Clocking source to
be used for direct connection of OP11 to a
local synchronous terminal or a focal synchronous
computer interface. The following
Baud rates are available: 2000, 2400,
4800, 9600, 19.2K, 40.8K and 50K Baud.
If no rate is specified, 40.8K Baud will be
supplied.
Synchronous/asynchronous null modem
jumper box. Allows direct connection of a
PDP-ll to any peripheral with a modem
type interface which conforms to EIA RS-
232-C and CCITT specifications. (A DPll­
KA is generally required when the HB312A
is used with the DPll·DA).
8.5 ASYNCHRONOUS 16-UNE SINGLE SPEED MULTIPLEXER DMll
8.5.1 Introduction
The DMll is a full- or half-duplex 16-line aynchronous multiplexer. All lines operate
at a common code length and Baud rate. The unit will operate at speeds up to
1200 Baud for the full 16 lines. Multiple DMll's can handle overl60 lines at 110
Baud. The DMll uses the PDP-l1 NPR (DMA) facility to assemble and to transmit
characters directly to or from core memory. The applications of the DMll
vary widely. They include terminal·oriented systems for time sharing, store and
forward message switching, data collection, and remote concentrators. The prime
advantages of the DMII in these applications is the high level of price/ performance
that it offers for interfacing multiple terminals or modems to a PDP-II system.
Receiver
The receiver control automatically performs character start bit synchronization,
data bit assembly and direct DMA (NPR) character storage in a 64-word Receiver
Circular Buffer.
The Circular Buffer contains data characters in the low order byte; the line number
and character status are contained in the high order byte of each word entry.
The characters are stored right-justified; the first bit received is in the least signifi·
cant position. The character status indicates if the character ended with a legal
stop bit (mark) and provides an indication of parity of the received character.
Transmitter
The transmitter control performs NPR (DMA) message transmission under the
control of program-settable Byte Count and Byte Address locations. The Start Bit
and Stop Units are provided by the control thus allowing data in core to be byte
processed. The characters are serialized right most bit first. The DMll does not
disturb the data in core during transmission. This allows a single message to be
transmitted on multiple OMII lines simultaneously. A program interrupt request
at the specified priority level will be generated when the transmit Byte Count on
any line decrements to zero. The program then determines the affected line (by
testing the hardware activity register) and initiates the proper transmit action.
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