PDP11 PeripheralsHbk 1972 - Trailing-Edge
PDP11 PeripheralsHbk 1972 - Trailing-Edge
PDP11 PeripheralsHbk 1972 - Trailing-Edge
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A B C D E F<br />
4 UNIBUS CONN<br />
3 POWER<br />
2 RESERVED<br />
UNIBUS CONN<br />
Figure 2-30 SS 11 Module Layout<br />
2.4.2 DDII-A Peripheral Mounting Panel<br />
Peripherals may be divided into large and small categories based on the size of<br />
the associated interface logic. If the interface logic (including the M105 Address<br />
Selector and the M782 Interrupt Control) can fit into four module slots, then the<br />
associated device is referred to as a small peripheral. The DDll·A peripheral<br />
mounting panel is a pre·wired system unit designed for mounting up to four small<br />
peripheral interfaces. The physical construction of the DDll·A is similar to the<br />
BSll blank mounting panel.<br />
Use of the DDll·A requires specialized logic cards for the actual interface, since<br />
the pin assignments are fixed for the various control and data signals. Examples<br />
of such interfaces are the DRll·A General Interface (M786 module), LPll Printer<br />
Control (M793 module), CRll Card Reader (M829 module), M792 Diode Memory,<br />
and the KLll Teletype Control (M780 module). Customers may design interfaces<br />
to go into a DDll·A by using the W943 module which allows wire·wrapping of the<br />
integrated circuit interconnections.<br />
Figure 2·31 illustrates module allocation within a DDll·A unit. Slot A2 must be<br />
empty because of power cable overhang; slots S2 and S3 are unused. The DDll·A<br />
is wired to permit the installation of four M7820 modules in column F, four M105<br />
modules in column E, and four double·height device interface modules in col·<br />
umns C and D. The unidirectional grant lines are wired to column D, and each device<br />
interface module must include jumper arrangements to allow selection of the<br />
device priority level at the time of installation. Only SR levels are wired to<br />
this column; devices mounted in a DDll·A unit cannot be assigned to the NPR<br />
priority level without rewiring the panel. An additional constraint imposed on the<br />
interface is that each device may be on only one request level, since both inter·<br />
rupts available through one M7820 module are wired in series and must be at the<br />
same priority level.<br />
If the device requires interface logic that occupies more than one full row of space<br />
in the DDll·A, columns C and D of the second row can be used by using wiring<br />
provided between rows 1 and 2 and rows 3 and 4. If this is done, it is no longer<br />
necessary to add another MI05 and M782 module to slots E and F of the second<br />
row.<br />
Additional considerations that must be noted when using a DDl1-A as well as<br />
specific pin number information is covered in subsequent paragraphs.<br />
240<br />
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