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PDP11 PeripheralsHbk 1972 - Trailing-Edge

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A Detect Answer option is used. The 801 retains line control and looks for<br />

an answering tone, from the called station. Upon receiving the tone the<br />

modem is connected to the line, Data Set Status is asserted and a program<br />

interrupt is generated (DSS = 1). This stops the Abandon Call and Retry<br />

timer which would have been initiated had no tone been received. These, in<br />

turn, would have generated a signal to the DN 11 and cause a program interrupt<br />

with the Abandon Call and Retry bit set (ACR = 1). The program<br />

would then either retry or drop the call.<br />

b) If using modems without the automat!c handshaking feature:<br />

The End-of-Number (EON) mode must be used. EON is sent after the last<br />

digit has been dialed. This causes the 801 to connect the modem to the<br />

line and assert Data Set Status (DSS = 1). However, the modem and its<br />

controller must be able to determine when the called station has answered<br />

and is sending data. To do this, it is necessary to use an 801 with option<br />

"Y"(available from the Telephone Company). This option lets the Abandon<br />

Call and Retry timer continue running even after the DSS bit has been set.<br />

When the ACR timer times out it will notify the user of the line to check if<br />

data is being received by the modem<br />

14. There are two options available when terminating a call:<br />

a) The Call Request bit is set to zero (FCRQ = 0). This will remain until the<br />

Data Line Occupied bit also goes to zero (DLO=O), which is a necessary condition<br />

before a new call can be initiated.<br />

b) If the 801 option "Z"is used, the call can be terminated by clearing Data<br />

Terminal Ready in the modem. In this case, dropping Call Request will not<br />

terminate the call. However, it must be dropped before a new call can be<br />

attempted.<br />

15. Should the 801 lose power during a call an interrupt will be generated and the<br />

Power Off bit will be set (PWI = 1). The interface will not return an interrupt if<br />

the Call Request bit is set with the power off (FCRQ = 1).<br />

8.3.3 Programming<br />

Each ACU interface contains one register and therefore requires one l6-bit address.<br />

Address space has been assigned for 64 interfaces. The four addresses for<br />

the four interfaces that can be plugged into one system unit must be consecutive<br />

addresses starting with 175XXO where XX = 20 for the first line. If only one line is<br />

in use, it uses address 175200. Interface number 2 has address 175202, and interface<br />

number 64 has address 175376.<br />

Note: In addition to the individual Interrupt Enable bit for each interface, there is<br />

a master enable bit associated with line number 1 of a given system unit. It enables<br />

the interrupts for the entire group. The master enable bit on lines 2 through<br />

4 of a given system unit are ignored by the interface.<br />

Each set of four DNll's requires one interrupt vector. The vector address for<br />

communications options are assigned in the range from 300 to 777 according to<br />

the following convention:<br />

1. The first DC1l assigned in a system will be given vector address 300, the next<br />

one (if any) will be given vector 310 etc.<br />

2. Then KUl's will be assigned in order.<br />

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