PDP11 PeripheralsHbk 1972 - Trailing-Edge

More documents

Recommendations

Info

475 COMPLETE NOTES' Worst ease propagation delay of 75ns is shown. Total time =475ns for a single transfer. Next eyc Ie may begin at 400ns when master may assert new address and control. Maximum sustained transfer rate is 2.5 mi Ilion words/sec. SLAVE DECODES ADDRESS a CONTROL $LAVE STROBES DATE a RETURNS SSYN SLAVE CLEARS SS'fN Figure 1-9 Typical DATO Timing Flow 193
Page 4:
CONTENTS PART I Chapter 1· Program
Page 14:
viii
Page 18:
Chapter 8 - COMMUNICATIONS OPTIONS
Page 24:
6 5-4 3-1 o Interrupt Enable Memory
Page 28:
PART I Chapter 2 Basic I/O Terminal
Page 36:
2.2.3 Programming Examples Reading
Page 40:
Model Type Power Descri ption L T33
Page 50:
Punch Interrupt Service This interr
Page 56:
LPII HIGH SPEED LINE PRINTER 19
Page 68:
BIT 15 14 13 12 11 10 9 8 7 6 NAME
Page 76:
LA30-DECwriter 29
Page 82:
Ribbon: Code: Temperature: Humidity
Page 88:
Figure 3"2 - DECtape Block Arrangem
Page 98:
3-1 Function Bits o DO' Word Count
Page 104:
Density: Data Capacity: Tape Motion
Page 108:
TU 10 MAGTAPE UNIT 3.2.2 Operation
Page 118:
10 End of Tape (EaT) 9 Record Lengt
Page 122:
When the MTBRC is used in a space f
Page 130:
4.2 STORAGE DISPLAY VTOIA The VT01A
Page 134:
Brightness: Linearity: Deflection M
Page 138:
Weight: Heat Dissipation: Operating
Page 144:
PART I Chapter 5 Disk Storage Devic
Page 156:
BIT 15 14 13 12 11 10 9 8 7 NAME Sp
Page 166:
RFll/RSll DECDISK 74
Page 174:
7 Data Request Late (DRL) 6 Unused
Page 178:
(A stepdown autotransformer is prov
Page 188:
BIT 15 14 13 12 11 10 9 8 7 NAME Dr
Page 196:
15-13 Drive Select (DR SEL) Contain
Page 200:
PART I Chapter 6 Clocks 6.1 PROGRAM
Page 204:
Count Set Buffer Register (Write On
Page 208:
ON: TST8 LKS 8PLON CLR8 LKS OFF: TS
Page 220:
The signal on the UNIBUS that cause
Page 224:
The internal timer is started every
Page 232:
7.2.9 Specifications Bus Address: P
Page 236:
PART I Chapter 8 Communications Opt
Page 242:
10,9 Character Length 8 Superv. Tra
Page 248:
8.2.5 Ordering Information DEC. NO.
Page 256:
used by the ACU. It allows the prog
Page 260:
Physical Connection: Power Required
Page 266:
Pin 1 2 3 4 5 6 7 8 15 17 20 22 24
Page 274:
10 Clear to Send 9 Request to Send
Page 280:
DPll-KA DPll H312A DP11-DA Internal
Page 288:
3. Receive Procedure. The programmm
Page 300:
nanoseconds for the DM 11) UN IBUS
Page 312:
2 Request to Send Data terminal Rea
Page 316:
B. Private line Modems (No Control)
Page 320:
8.6 FULL DUPLEX 8·BIT ASYNCHRONOUS
Page 338:
Each multiplexer channel switch con
Page 348:
c. Output Driver Module BW403 . Is
Page 358: 170
Page 362: 172
Page 366: 174
Page 372: Transfer Request Handling The reque
Page 376: PART II Chapter 1 UNIBUS Theory and
Page 382: . Bus Grant Lines (BG
Page 392: f. When the selected slave sees its
Page 400: (discussed in Paragraph 2.3.5), the
Page 408: TIME (ns) o 150 225 300 375 450 525
Page 418: 200
Page 428: +5V TYPICAL UNIBUS DRIVER +5V TYPIC
Page 432: Figure 2-4 UNIBUS Jumper Module M92
Page 448: Table 2-3 Gating Control Signals Mo
Page 460:
Figure 2-17 State Diagram of Master
Page 466:
2.2.6 M795 Word Count and Bus· Add
Page 470:
Table 2·6 M795 Output Signals Asse
Page 482:
Signal Name BUS C ADRS TO BUS ADRS
Page 494:
2.4 PDP·ll INTERFACE HARDWARE The
Page 504:
2.4.2.5 External Device Cables-An e
Page 518:
Signal levels used in the interface
Page 524:
3.3.2 DRll-A Implementation A conve
Page 538:
I\) O'l o READY (1) H START CONVERS
Page 550:
nel and low COY) for a transfer fro
Page 556:
5 through 1 of the UNIBUS-to-UNIBUS
Page 566:
ation and each successive cycle of
Page 578:
Second, the DRDB functions as a 16
Page 582:
260 264 270 USER RESERVED 274 USER
Page 586:
777410 RKBA 777406 RKWC 777404 RKCS
Page 590:
772546 772544 772542 772540 772536
Page 594:
770070 LATENCY TESTER 770056 TO 770
Page 598:
TABLE B-2 UNIBUS PIN ASSIGNMENTS (B
Page 602:
292
Page 606:
RS64 Disk .........................
show all

PDP11 PeripheralsHbk 1972 - Trailing-Edge

Create successful ePaper yourself

Delete template?

Save as template?