B. P. Lathi, Zhi Ding - Modern Digital and Analog Communication Systems-Oxford University Press (2009)

178 AMPLITUDE MODULATIONS AND DEMODULATIONS
reaches the value 03 , where equilibrium is attained. Hence, in steady state, the phase error is a
constant 03 . This means the loop is in frequency lock; that is, the VCO frequency is now wo,
but there is a phase error of 03 . Note, however, that if lwo - We i > AK, there are no equilibrium
points in Fig. 4.28, the loop never achieves lock, and 0 e continues to move along the trajectory
forever. Hence, this simple loop can achieve phase lock provided the incoming frequency w 0
does not differ from the quiescent VCO frequency We by more than AK.
In Fig. 4.28, several equilibrium points exist. Half of these points, however, are unstable
equilibrium points, meaning that a slight perturbation in the system state will move the
operating point farther away from these equilibrium points. Points 01 and 03 are stable points
because any small perturbation in the system state will tend to bring it back to these points.
Consider, for example, the point 0 3 . If the state is perturbed along the trajectory toward the
right, 0 e is negative, which tends to reduce 0 e and bring it back to 0 3 . If the operating point
is perturbed from 0 3 toward the left, 0 e is positive, 0 e will tend to increase, and the operating
point will return to 0 3 . On the other hand, at point 02 if the point is perturbed toward the right,
0 e is positive, and 0 e will increase until it reaches 0 3 . Similarly, if at 02 the operating point is
perturbed toward the left, 0 e is negative, and 0 e will decrease until it reaches 01 . Hence, 02 is
an unstable equilibrium point. The slightest disturbance, such as noise, will dislocate it either
to 01 or to 0 3 . In a similar way, we can show that 04 is an unstable point and that 01 is a stable
equilibrium point.
The equilibrium point 0 3 occurs where 0 e = 0. Hence, from Eq. (4.40),
. - I wo -w C
03 = sm
AK
If 03 « n /2, then
WO - We
0 3 --­
AK
which agrees with our previous result of the small-error analysis [Eq. (4.36b)] .
The first-order loop suffers from the fact that it has a constant phase error. Moreover, it
can acquire frequency lock only if the incoming frequency and the VCO quiescent frequency
differ by not more than AK rad/s. Higher order loops overcome these disadvantages, but they
create a new problem of stability. More detailed analysis can be found in Gardener. 8
Generalization of PLL Behaviors
To generalize, suppose that the loop is locked, meaning that the frequencies of both the input
and the output sinusoids are identical. The two signals are said to be mutually phase coherent
or in phase lock. The VCO thus tracks the frequency and the phase of the incoming signal. A
PLL can track the incoming frequency only over a finite range of frequency shift. This rahge
is called the hold-in or lock range. Moreover, if initially the input and output frequencies are
not close enough, the loop may not acquire lock. The frequency range over which the input
will cause the loop to lock is called the pull-in or capture range. Also if the input frequency
changes too rapidly, the loop may not lock.
If the input sinusoid is noisy, the PLL not only tracks the sinusoid, but also cleans it up. The
PLL can also be used as a frequency modulation (FM) demodulator and frequency synthesizer,
as shown later, in the next chapter. Frequency multipliers and dividers can also be built using
PLL. The PLL, being a relatively inexpensive integrated circuit, has become one of the most
frequently used communication circuits.
In space vehicles, because of the Doppler shift and oscillator drift, the frequency of the
received signal has a lot of uncertainty. The Doppler shift of the carrier itself could be as high
as ± 75 kHz, whereas the desired modulated signal band may be just 10 Hz. To receive such a