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6th European Conference - Academic Conferences

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Michael Bilzor<br />

Figure 1: A taxonomy of malicious inclusions, modified slightly from (Tehranipoor 2010)<br />

Table 1: Processor circuit type, with some associated MI mitigation and detection techniques<br />

Circuit Type Detection/Mitigation Technique<br />

Control Flow Control Flow Execution Monitor<br />

(subject of our experiments)<br />

Chip Control, Test, and Debug Keep-Alive Protections<br />

Data Paths Datapath Integrity Verification<br />

Memory Storage and Retrieval Load/Store Verification<br />

Arithmetic and Logic Computation Arithmetic/Logic Verification<br />

In Figure 2, we update the malicious inclusion taxonomy from Figure 1, and associate each MI action<br />

type with a matching detection or mitigation technique:<br />

Figure 2: Malicious inclusion taxonomy, with associated mitigation and detection methods<br />

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