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A User Centric Security Model for Tamper-Resistant Devices

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4.5 Attestation Mechanisms<br />

4.5 Attestation Mechanisms<br />

In this section, we discuss the two attestation mechanisms based on non-simulatable PUFs<br />

and pseudorandom number generators that combine the functionality attestation handler<br />

and self-test manager discussed in section 4.3.<br />

4.5.1 Non-simulatable PUFs<br />

A non-simulatable PUF is a PUF that is computationally dicult to simulate by either the<br />

device manufacturer or a malicious entity. This property has made non-simulatable PUFs<br />

a candidate <strong>for</strong> true/pseudo random number and secret key generators [123, 133, 134].<br />

Based on non-simulatable PUFs, we describe two algorithms 4.1 and 4.2 that take into<br />

account the oine and online modes of the attestation mechanism.<br />

Algorithm 4.1: Self-test algorithm <strong>for</strong> oine attestation based on a PUF<br />

Input : l; list (array) of selected memory addresses.<br />

Output : S; signature key of the smart card.<br />

Data: seed; temporary seed value <strong>for</strong> the PRNG set to zero.<br />

n; number of memory addresses in the list l.<br />

i; counter set to zero.<br />

a; memory address.<br />

k; secret key used to encrypt the signature key of the smart card.<br />

S e ; encrypted signature key using a symmetric algorithm with key k.<br />

Notation:<br />

x ←− y+z: rst the operation on the right of the arrow will be per<strong>for</strong>med and the<br />

result will be stored in x. This notation is common <strong>for</strong> all algorithms in this thesis.<br />

1 SelfTestOffline (l) begin<br />

2 while i < n do<br />

3 a ←− ReadAddressList (l,i)<br />

4 seed ←− Hash (ReadMemoryContents (a), seed)<br />

5 i ←− i+1<br />

6 if seed ≠ ∅ then<br />

7 k ←− nmPUF (seed)<br />

8 else<br />

9 return testfailed<br />

10 S ←− DecryptionFunction (k, S e )<br />

11 return S<br />

The oine algorithm is based on the function SelfTestOffline that takes a list of selected<br />

memory addresses (l) stored on the card by the card manufacturer. This list has memory<br />

addresses of security and reliability critical components of the smart card plat<strong>for</strong>m. The<br />

93

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