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ETP ANNUAL REPORT 2011
Exhibit 7.3
Developing Integrated Circuit Design Firms
Integrated Circuit (IC) design companies are ideal test beds to
produce highly-skilled human capital as they require knowledge
workers with the inventiveness to create intellectual property.
Malaysia has only achieved moderate success in this field, with a
mere 15 active IC design firms comprising a blend of multinational
and domestic companies before 2011. Nevertheless, the success
of existing IC design facilities like Intel’s Penang Design Centre has
set the stage for others to follow in their footsteps.
The goal of this EPP is to add another 50 IC design companies
beyond the present number. Batu Kawan in Penang has been
designated as a hub for high value E&E including IC design
services.
Achievements
Five out of the original 2011 target of 10 IC design firms have
been set up. Additionally, an IC Design Centre of Excellence has
been completed on schedule while the Failure Analysis Lab is
estimated at 65 per cent completion. However, the 2011 target
for a Contactless Testing Lab, eg. Penang Skills Development
Centre’s (PSDC) EMC lab, to achieve international accreditation
was only obtained in early January 2012. Additional resources will
be invested to assist PSDC to increase the reach and effectiveness
of the EMC Lab, which was funded by an initial Economic Planning
Unit (EPU) grant. This service offered by this lab will further
strengthen efforts to grow the high value-added design and
development cluster.
Centre of Excellence (CoE)
for Electrical and Electronics: IC Design
The CoE is an educational institution whose main point of focus is in
Integrated Circuit (IC) Design. It provides education through short
courses with the objective of aligning the E&E industry in a
competitive and innovative track, in line with EPP3: Development of
IC Design Firms. Usains InfoTech Sdn Bhd (UISB) acts as the Special
Purpose Vehicle for this project.
26 graduate trainees
in Advanced Digital
Design
24 graduate trainees
in Advanced Analog
Design
• Commenced on Jan 2010
• Completed in June 2011
• Commenced on Aug 2010
• Completing in Jan 2012
Development programmes
• Product development for potential spin-off and nurture local incubator
• Development of IC Design Outsourcing Programme to support ecosystem
• Promote CoE E&E initiatives
126
EPP 3
MSc degree
by USM
Exhibit 7.4
Failure Analysis Illustration
Level 1
Physical
Analysis
Gross Defect
• Physical
• On surface
Level 2
Electrical Physical
Analysis
Embedded Defect
• In between layers
• Embedded
defects
Level 3
Material
Analysis
Material
characterisation
• Molecular defects
• Polymer bonds
and structures
Moving Forward
A concerted effort will be made in 2012 to address the shortfall
in meeting this year’s KPI targets. Specifically, the lead (MIDA)
and supporting agencies (NCIA, EPU, MDeC, Silterra and the
fabrication consortium) for this EPP will intensify the drive to
attract multinational corporations and grow local players at the
originally-proposed rate of 10 per year for a total of 50 by 2015.
The agencies will continue to identify and encourage potential IC
design companies to set up in Malaysia with the value proposition
of proximity to fabrication facilities. MIDA will seek to entice
potential firms with pre-approved incentives with particular
focus on filling the niche for smaller design firms. Such incentives
seek to encourage multinationals to outsource their IC design to
domestic firms. Meanwhile, the EPU will increase financial support
to skills development centres to develop human capital in IC
design. To support the emergence of aspiring local companies,
NCIA is putting in place several measures to lower the start-up
costs for home-grown firms. These include the provision of a
prototyping lab, a test lab for certification and standards, and the
requisite electronic design automation tools on a sharing and
pay-per-use basis.