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Retinal Prosthesis Dissertation - Student Home Pages

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END COMPONENT;<br />

COMPONENT pulsar --Intensity values to<br />

pulse count.<br />

Port (pc_clk: in std_logic; --pc_clk maps to "spike_clock"<br />

value: in STD_LOGIC_VECTOR (7 downto 0); --8 bits<br />

ZZ: out std_logic_vector (7 downto 0)); --8 bits<br />

END COMPONENT;<br />

--The following component: "pulse_count_to_pc_stream" is the OUTGOING signal<br />

COMPONENT pulse_count_to_pc_stream is<br />

Port (pc_clk: in STD_LOGIC;<br />

four_bit_address: in STD_LOGIC_VECTOR (3 downto 0);<br />

R_count: in STD_LOGIC_VECTOR (7 downto 0);<br />

G_count: in STD_LOGIC_VECTOR (7 downto 0);<br />

B_count: in STD_LOGIC_VECTOR (7 downto 0);<br />

pc_stream: out STD_LOGIC_VECTOR (21 downto 0) --formerly (33/23<br />

downto 0)<br />

); --Use "file_support_conventional_stream.vhd" to write to<br />

"colour_stream.csv"<br />

END COMPONENT;<br />

--dout: out std_logic_vector ((3*data_width) - 1 downto 0));<br />

constant clock_cycle: time: = 39.0625 ns; --25MHz has the periodic time 40ns<br />

--Simulation time will be: 2500000ns<br />

--signal show_p_data: std_logic_vector (23 downto 0);<br />

signal pixel_data: std_logic_vector (23 downto 0);<br />

signal incoming_clock: std_logic;<br />

signal incoming_clock_done: boolean: = not TRUE;<br />

signal partial_spike_clock: std_logic;<br />

signal spike_clock: std_logic;<br />

signal pixel_clock: std_logic;<br />

signal resits: std_logic;<br />

signal partial_clock_done: boolean: = not TRUE;<br />

signal address: std_logic_vector (3 downto 0):= "0000";<br />

signal addra: std_logic_vector (3 downto 0):= "0000";<br />

constant reset_time: time: = 1*clock_cycle;<br />

--Declaring the raw colour signals<br />

signal red: std_logic_vector (7 downto 0);<br />

signal green: std_logic_vector (7 downto 0);<br />

signal blue: std_logic_vector (7 downto 0);<br />

--Declaring the colour signals in terms of their pulse count<br />

signal red_pulse_count:std_logic_vector (7 downto 0);<br />

signal green_pulse_count:std_logic_vector (7 downto 0);<br />

signal blue_pulse_count:std_logic_vector (7 downto 0);<br />

signal pulse_count_stream: std_logic_vector (21 downto 0); --formerly (33/23<br />

downto 0)<br />

begin<br />

--tb_clk: process is<br />

--begin<br />

-- incoming_clock

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