Retinal Prosthesis Dissertation - Student Home Pages

FPGA Receiver (structural) chip
signal stream_red_pulse_count: std_logic_vector (9 downto 0);
signal stream_green_pulse_count: std_logic_vector (9 downto 0);
signal stream_blue_pulse_count: std_logic_vector (9 downto 0);
--For a two by two image the address bits allowed are two bits
signal red_incoming_address: std_logic_vector (51 downto 0);
signal green_incoming_address: std_logic_vector (51 downto 0);
signal blue_incoming_address: std_logic_vector (51 downto 0);
signal red_feed: std_logic_vector (59 downto 0);
signal green_feed: std_logic_vector (59 downto 0);
signal blue_feed: std_logic_vector (59 downto 0);
signal rc_red_feed: std_logic_vector (61 downto 0);
signal rc_green_feed: std_logic_vector (61 downto 0);
signal rc_blue_feed: std_logic_vector (61 downto 0);
signal red_with_rc_address: std_logic_vector (61 downto 0);
signal green_with_rc_address: std_logic_vector (61 downto 0);
signal blue_with_rc_address: std_logic_vector (61 downto 0);
signal red_between_address: std_logic_vector (9 downto 0);
signal green_between_address: std_logic_vector (9 downto 0);
signal blue_between_address: std_logic_vector (9 downto 0);
--Signals to implant
signal red_data_preform: std_logic_vector (49 downto 0);
signal green_data_preform: std_logic_vector (49 downto 0);
signal blue_data_preform: std_logic_vector (49 downto 0);
--58*3 equals 174 {three in an rgb packet}
signal composite_addressed_stream: std_logic_vector (173 downto
0):="0000000000000000000000000000000000000000000000000000000000000000
00000000000000000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000";
--THE ADDRESSES FOLLOWING MUST REACH 4 ELECTRODES!
signal red_1_4_addressed: std_logic_vector (57 downto 0);
signal green_2_5_addressed: std_logic_vector (57 downto 0);
signal blue_3_6_addressed: std_logic_vector (57 downto 0);
signal red_data: std_logic_vector (49 downto 0);
signal green_data: std_logic_vector (49 downto 0);
signal blue_data: std_logic_vector (49 downto 0);
signal red_pulse_stream: std_logic_vector (199 downto 0);
signal green_pulse_stream: std_logic_vector (199 downto 0);
signal blue_pulse_stream: std_logic_vector (199 downto 0);
signal pic_size: std_logic_vector (5 downto 0):= "000000";--Six bits;
signal qpulse_size: std_logic_vector (15 downto 0):= "0000000000000000";--
Sixteen bits
signal red_x_out: std_logic_vector (999 downto 0);
signal green_y_out: std_logic_vector (999 downto 0);
signal blue_z_out: std_logic_vector (999 downto 0);
signal number_out: std_logic_vector (0 downto 0):="0";
signal outer_red_pulse_stream: std_logic_vector (999 downto 0);
signal outer_green_pulse_stream: std_logic_vector (999 downto 0);
signal outer_blue_pulse_stream: std_logic_vector (999 downto 0);
signal send_num_out: std_logic_vector (0 downto 0);
signal send_num_unsigned_out: std_logic_vector (0 downto 0);
signal zero_out: std_logic_vector (0 downto 0);
163 of 200