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Retinal Prosthesis Dissertation - Student Home Pages

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2.6.2 FPGA representation of epi_retinal approach<br />

The following diagram (figure 21) gives a basic overview of the epi_retinal<br />

prosthesis. The sender chip receives the camera output and converts it to an AER<br />

protocol[170]. This serial communication of a stream of pulses is wired from the<br />

sender chip to the receiver chip. In this diagram the separation of the receiver chip<br />

into two distinct parts i.e. external to the body and internal to the body is not shown,<br />

this is ably discussed in other papers [53]. The action of the receiver chip is to<br />

convert the serial transmission into the parallel form required for transmission to the<br />

retinal implant incorporating timing considerations, to form biphasic pulses. The<br />

implant (Addressing the implant) is then addressed in the sense that all wires now<br />

entering the eyeball carry a separate stream of information for each electrode to be<br />

driven by the post processing electrode drivers attached to the electrode array.<br />

AER protocol<br />

Receiver.<br />

<strong>Retinal</strong> implant.<br />

PISO<br />

Sender.<br />

Digital address<br />

stream (AER)<br />

Serial to parallel conversion<br />

Timing considerations<br />

Addressing the implant<br />

Form biphasic pulses<br />

Electrode<br />

array<br />

Control/<br />

addressing<br />

Figure 21 FPGA view of processing<br />

48 of 200

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